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#pragma once
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#include "DSP2833x_Device.h"
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#include "DSP28x_Project.h"
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namespace canSpace {
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enum CAN_VARIANT{
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CANA,
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CANB
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};
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// eCAN Message Control Register (MSGCTRL) bit definitions
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struct MsgCtrlBits { // bits description
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Uint16 DLC:4; // 0:3
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Uint16 RTR:1; // 4
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Uint16 rsvd1:3; // 7:5 reserved
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Uint16 TPL:5; // 12:8
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Uint16 rsvd2:3; // 15:13 reserved
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};
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union MsgCtrlReg {
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Uint16 all;
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struct MsgCtrlBits bit;
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MsgCtrlReg(Uint16 configData = 0){
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all = configData;
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}
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};
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struct MsgID_Bits { // bits description
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Uint16 EXTMSGID_L:16; // 0:15
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Uint16 EXTMSGID_H:2; // 16:17
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Uint16 STDMSGID:11; // 18:28
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Uint16 AAM:1; // 29
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Uint16 AME:1; // 30
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Uint16 IDE:1; // 31
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};
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// Allow access to the bit fields or entire register
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union MsgID {
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Uint32 all;
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struct MsgID_Bits bit;
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MsgID(Uint32 boxID = 0xAAA, bool isExtendedID = false, bool isAAM = false, bool isAME = false) {
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if(!isExtendedID){
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bit.STDMSGID = boxID;
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bit.EXTMSGID_H = 0;
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bit.EXTMSGID_L = 0;
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}
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else{ all = boxID; }
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bit.IDE = isExtendedID;
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bit.AAM = isAAM;
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bit.AME = isAME;
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}
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MsgID(const MsgID& init) {
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all = init.all;
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}
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};
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struct CANMessage {
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union MsgCtrlReg msgctrl;
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union CANMDL_REG mdl;
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union CANMDH_REG mdh;
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CANMessage(){
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mdl.all = 0;
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mdh.all = 0;
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}
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};
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class CAN{
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public:
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CAN(CAN_VARIANT canVariant);
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void initGpio();
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void config(Uint16 baudrate);
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void configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg);
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void configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg);
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void configSystemIsr(Uint32 flags);
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void configMBoxIsr(Uint16 boxNumber); // TODO not realized yet
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bool isNewMessage();
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bool isNewMessage(Uint16 boxNumber);
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void transmitMsg(Uint16 boxNumber, const CANMessage& message);
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void updateTXMessage(Uint16 boxNumber, const CANMessage& message);
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void sendRemoteRequest(Uint16 boxNumber);
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bool receiveMsg(Uint16 boxNumber, CANMessage& rxMessage);
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private:
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CAN_VARIANT canPort;
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volatile ECAN_REGS* p_CanRegs_;
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ECAN_REGS CanShadow_;
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volatile ECAN_MBOXES* p_CanMBoxes_;
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};
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} // canSpace
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#define I0EN_ENABLE 1ul
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#define I1EN_ENABLE 1ul << 1
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#define GIL_ENABLE 1ul << 2
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#define WLIM_ENABLE 1ul << 8
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#define EPIM_ENABLE 1ul << 9
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#define BOIM_ENABLE 1ul << 10
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#define RMLIM_ENABLE 1ul << 11
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#define WUIM_ENABLE 1ul << 12
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#define WDIM_ENABLE 1ul << 13
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#define AAIM_ENABLE 1ul << 14
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#define TCOM_ENABLE 1ul << 16
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#define MTOM_ENABLE 1ul << 17
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#define SYSTEM_INTERRUPTS (\
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I0EN_ENABLE |\
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AAIM_ENABLE \
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)
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