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#pragma once
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#include <stdint.h>
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namespace can_space {
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enum MBOX_NUMBERS {
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MODBUS_SETTINGS_MBOX = 0,
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COMM_VERSION_MBOX = 1,
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MODBUS_DATA_COMM_TO_CPU_RSV2_MBOX = 26,
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MODBUS_DATA_COMM_TO_CPU_RSV1_MBOX = 27,
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MODBUS_DATA_CPU_TO_COMM_MBOX = 28,
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MODBUS_DATA_COMM_TO_CPU_MBOX = 29,
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DIGITAL_INPUT_MBOX = 30,
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DIGITAL_OUTPUT_MBOX = 31
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};
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enum CAN_VARIANT{
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CANA,
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CANB
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};
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enum configFlags{
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NONE = 0,
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MSB_ENABLE = 1u << 0,
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STM_ENABLE = 1u << 1
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};
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enum configSystemIsrFlags{
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I0EN_ENABLE = 1ul,
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I1EN_ENABLE = 1ul << 1,
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GIL_ENABLE = 1ul << 2,
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WLIM_ENABLE = 1ul << 8,
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EPIM_ENABLE = 1ul << 9,
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BOIM_ENABLE = 1ul << 10,
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RMLIM_ENABLE = 1ul << 11,
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WUIM_ENABLE = 1ul << 12,
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WDIM_ENABLE = 1ul << 13,
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AAIM_ENABLE = 1ul << 14,
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TCOM_ENABLE = 1ul << 16,
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MTOM_ENABLE = 1ul << 17
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};
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// eCAN Message Control Register (MSGCTRL) bit definitions
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struct MsgCtrlBits { // bits description
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uint16_t DLC:4; // 0:3
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uint16_t RTR:1; // 4
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uint16_t OPC:1; // 1
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uint16_t rsvd1:2; // 7:6 reserved
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uint16_t TPL:5; // 12:8
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uint16_t rsvd2:3; // 15:13 reserved
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};
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union MsgCtrlReg {
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uint16_t all;
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struct MsgCtrlBits bit;
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MsgCtrlReg(uint16_t configData = 0){
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all = configData;
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}
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};
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struct MsgID_Bits { // bits description
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uint16_t EXTMSGID_L:16; // 0:15
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uint16_t EXTMSGID_H:2; // 16:17
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uint16_t STDMSGID:11; // 18:28
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uint16_t AAM:1; // 29
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uint16_t AME:1; // 30
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uint16_t IDE:1; // 31
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};
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// Allow access to the bit fields or entire register
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union MsgID {
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uint32_t all;
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struct MsgID_Bits bit;
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MsgID(uint32_t boxID = 0xAAA, bool isExtendedID = false, bool isAAM = false, bool isAME = false) {
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if(!isExtendedID){
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bit.STDMSGID = boxID;
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bit.EXTMSGID_H = 0;
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bit.EXTMSGID_L = 0;
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}
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else{ all = boxID; }
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bit.IDE = isExtendedID;
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bit.AAM = isAAM;
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bit.AME = isAME;
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}
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MsgID(const MsgID& init) {
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all = init.all;
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}
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};
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struct CANMessage {
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uint16_t dataLength;
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union CANMDL_REG mdl;
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union CANMDH_REG mdh;
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CANMessage(){
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mdl.all = 0;
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mdh.all = 0;
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}
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};
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}
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