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1169 lines
35 KiB
C++
1169 lines
35 KiB
C++
/*
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* SystemEnvironment.h
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*
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* Author: Aleksey Gerasimenko
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* gerasimenko.aleksey.n@gmail.com
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*/
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#include <math.h>
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#include <stdint.h>
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#include <SYSCTRL/SignalDecomposeFIV.h>
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#include "framework.h"
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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
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#include "DSP2833x_Examples.h"
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#include "SYSCTRL/TypeControl.h"
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#include "SYSCTRL/DRCDecomposer.h"
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#include "SYSCTRL/SystemDefinitions.h"
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#include "SYSCTRL/FanTimerControl.h"
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#include "SYSCTRL/HardWare.h"
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#include "SYSCTRL/MonitorDigitalInputSignal.h"
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#include "SYSCTRL/PhaseAlertMonitor.h"
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#include "SYSCTRL/SymmetricalComponents.h"
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#include "SYSCTRL/ScaleCompute.h"
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#include "SYSCTRL/SystemDefinitions.h"
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#include "SYSCTRL/HeadersFLTSYSLIB.h"
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#include "SYSCTRL/GeneratorSymmetricalComponents.h"
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#include "SYSCTRL/TriggerBase.h"
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#include "SYSCTRL/TriggerFault.h"
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#include "SYSCTRL/TriggerRS.h"
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#include "SYSCTRL/TriggerRegister.h"
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#ifndef SYSCTRL_SYSTEMENVIRONMENT_H_
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#define SYSCTRL_SYSTEMENVIRONMENT_H_
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namespace SYSCTRL
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{
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#define SOFTWARE_CLASS_ID ((uint16_t)(0x0001))
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#define SOFTWARE_PART_ID ((uint16_t)(0x0001))
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#define SOFTWARE_SOFTWARE_VERSION ((uint16_t)(0x0101))
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#define SOFTWARE_PROTOCOL_VERSION ((uint16_t)(0x0101))
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struct IDSOFTWARE
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{
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uint16_t class_id;
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uint16_t part_id;
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uint16_t software_version;
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uint16_t protocol_version;
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IDSOFTWARE():
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class_id(SOFTWARE_CLASS_ID),
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part_id(SOFTWARE_PART_ID),
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software_version(SOFTWARE_SOFTWARE_VERSION),
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protocol_version(SOFTWARE_PROTOCOL_VERSION)
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{}
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};//IDSOFTWARE
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struct InputDiscreteSignalsBitField
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{
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uint32_t remote_start: 1; // DI_3001 - bit 0
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uint32_t remote_stop: 1; // DI_3002 - bit 1
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uint32_t remote_reset: 1; // DI_3003 - bit 2
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uint32_t remote_e_stop: 1; // DI_3004 - bit 3
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uint32_t auxiliary_q1: 1; // DI_3005 - bit 4
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uint32_t bypass_ready: 1; // DI_3006 - bit 5
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uint32_t transformer_dvr_over_temperature_alarm: 1; // DI_3007 - bit 6
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uint32_t local_e_stop: 1; // DI_3008 - bit 7
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uint32_t cabinet_door_interlocked: 1; // DI_3009 - bit 8
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uint32_t arc_and_fire: 1; // DI_3010 - bit 9
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uint32_t hw_dvr_ready: 1; // DI_3011 - bit 10
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uint32_t auxiliary_km2: 1; // DI_3012 - bit 11
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uint32_t auxiliary_km11: 1; // DI_3013 - bit 12
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uint32_t transformer_t_over_temperature_fault: 1; // DI_3014 - bit 13
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uint32_t control_power_supply_status: 1; // DI_3015 - bit 14
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uint32_t auxiliary_km1: 1; // DI_3016 - bit 15
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uint32_t auxiliary_km3: 1; // DI_3017 - bit 16
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uint32_t transformer_dvr_over_temperature_fault: 1; // DI_3018 - bit 17
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uint32_t fan_fault: 1; // DI_3019 - bit 18
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uint32_t local_remote: 1; // DI_3010 - bit 19
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uint32_t reserved: 12; // reserved - bit 31-20
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};//InputDiscreteSignalsBitField
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union InputDiscreteSignals
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{
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uint32_t all;
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Register32BitField bit;
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DigitalInput digital;
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DigitalInputBitField field;
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SYSCTRL::InputDiscreteSignalsBitField signal;
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InputDiscreteSignals():
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all((uint32_t)0)
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{}
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};//InputDiscreteSignals
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struct OutputDiscteteSignalsBitField
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{
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uint32_t work: 1; // DO_4001 - bit 0
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uint32_t fault: 1; // DO_4002 - bit 1
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uint32_t ready: 1; // DO_4003 - bit 2
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uint32_t alarm: 1; // DO_4004 - bit 3
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uint32_t off_high_voltage_q1: 1; // DO_4005 - bit 4
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uint32_t on_q1: 1; // DO_4006 - bit 5
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uint32_t off_q1: 1; // DO_4007 - bit 6
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uint32_t on_km11: 1; // DO_4008 - bit 7
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uint32_t vs_control: 1; // DO_4009 - bit 8
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uint32_t allow_on_high_voltage: 1; // DO_4010 - bit 9
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uint32_t on_km1: 1; // DO_4011 - bit 10
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uint32_t off_km1: 1; // DO_4012 - bit 11
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uint32_t on_km2: 1; // DO_4013 - bit 12
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uint32_t off_km2: 1; // DO_4014 - bit 13
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uint32_t high_voltage_indicator: 1; // DO_4015 - bit 14
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uint32_t reserved_b15: 1; // DO_4016 - bit 15
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uint32_t mode_local_remote: 1; // DO_4017 - bit 16
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uint32_t on_km3: 1; // DO_4018 - bit 17
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uint32_t on_km11t: 1; // DO_4019 - bit 18
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uint32_t off_km3: 1; // DO_4020 - bit 19
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uint32_t reserved_12: 12; // reserved - bit 31-20
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};//OutputDiscteteSignalsBitField
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union OutputDiscteteSignalsRegister
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{
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uint32_t all;
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Register32BitField bit;
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DigitalOutputBitField field;
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OutputDiscteteSignalsBitField signal;
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OutputDiscteteSignalsRegister():
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all((uint32_t)0)
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{}
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};//OutputDiscteteSignalsRegister
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struct ExternalCommandWordBitField
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{
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uint16_t start: 1; //0
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uint16_t stop: 1; //1
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uint16_t reset: 1; //2
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uint16_t e_stop: 1; //3
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uint16_t km1_on: 1; //4
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uint16_t km1_off: 1; //5
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uint16_t km3_on: 1; //6
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uint16_t km3_off: 1; //7
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uint16_t q1_on: 1; //8
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uint16_t q1_off: 1; //9
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//
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};//ExternalCommandWordBitField
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union ExternalCommandWordRegister
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{
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uint16_t all;
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Register16BitField bit;
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ExternalCommandWordBitField signal;
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ExternalCommandWordRegister():
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all((uint16_t)0)
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{}
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};//ExternalCommandWordRegister
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struct AlgorithmControlBits
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{
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uint16_t enable_current_limit: 1; //0
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uint16_t enable_pfc: 1; //1
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uint16_t enable_harmonica: 1; //2
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uint16_t enable_auto_offset: 1; //3
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};//AlgorithmControlBits
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//
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union AlgorithmControlRegister
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{
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uint16_t all;
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Register16BitField bit;
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AlgorithmControlBits signal;
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AlgorithmControlRegister():
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all((uint16_t)9)
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{}
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};//AlgorithmControlRegister
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struct FlashOperationBitField
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{
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uint16_t burn: 1; //0
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uint16_t erase: 1; //1
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uint16_t verify: 1; //2
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uint16_t read: 1; //3
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uint16_t restore: 1; //4
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};//
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union FlashOperationRegister
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{
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uint16_t all;
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Register16BitField bit;
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FlashOperationBitField signal;
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FlashOperationRegister():
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all((uint16_t)0)
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{}
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};//FlashOperationRegister
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struct VecorModuleStructure
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{
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float module;
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float reciprocal;
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VecorModuleStructure():
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module(FP_ZERO),
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reciprocal(FP_ZERO)
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{}
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};//VecorModuleStructure
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struct VectorOrthogonalProjection
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{
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float active;
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float reactive;
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VectorOrthogonalProjection():
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active(FP_ZERO),
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reactive(FP_ZERO)
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{}
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};//
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struct SystemABCOrts
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{
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VectorOrthogonalProjection phase_a;
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VectorOrthogonalProjection phase_b;
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VectorOrthogonalProjection phase_c;
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SystemABCOrts():
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phase_a(),
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phase_b(),
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phase_c()
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{}
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};//
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struct AlgorithmCommonConstants
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{
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float transformation_coefficient;
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float transformation_coefficient_reciprocal;
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AlgorithmCommonConstants():
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transformation_coefficient(25.0),
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transformation_coefficient_reciprocal(1.0/25.0)
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{}
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};//AlgorithmCommonConstants
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struct AlgorithmCommonReference
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{
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float current_limit_rms;
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float current_limit_ampl;
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float current_pfc_rms;
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float current_pfc_ampl;
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float voltage_module_rms;
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float voltage_module_ampl;
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float voltage_rms_real;
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float voltage_rms_jm;
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float voltage_ampl_real;
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float voltage_ampl_jm;
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float voltage_dc;
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AlgorithmCommonReference():
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current_limit_rms(FP_ZERO),
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current_limit_ampl(FP_ZERO),
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current_pfc_rms(FP_ZERO),
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current_pfc_ampl(FP_ZERO),
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voltage_module_rms(FP_ZERO),
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voltage_module_ampl(FP_ZERO),
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voltage_rms_real(FP_ZERO),
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voltage_rms_jm(FP_ZERO),
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voltage_ampl_real(FP_ZERO),
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voltage_ampl_jm(FP_ZERO),
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voltage_dc()
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{}
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};//AlgorithmCommonReference
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struct HardwareAnalogCurrentFaultBitField
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{
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uint16_t phase_a: 1;
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uint16_t phase_b: 1;
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uint16_t phase_c: 1;
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uint16_t fault: 1;
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uint16_t vs: 1;
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};//HardwareAnalogCurrentFaultBitField
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union HardwareAnalogCurrentFaultRegister
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{
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uint16_t all;
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Register16BitField bit;
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HardwareAnalogCurrentFaultBitField signal;
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HardwareAnalogCurrentFaultRegister():
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all((uint16_t)0)
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{}
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};//HardwareAnalogCurrentFaultRegister
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struct AlgorithmSinglePhaseReference
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{
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float voltage_dc;
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float current_ampl_limit_const;
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float current_ampl_pfc_const;
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//
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float voltage_ampl_real_const;
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float voltage_ampl_jm_const;
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//
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float voltage_limit;
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float voltage_pfc;
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//
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float voltage_ampl_real;
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float voltage_ampl_jm;
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float voltage_cell_ampl_real;
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float voltage_cell_ampl_jm;
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float voltage_cell_real;
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float voltage_cell_jm;
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float voltage_cell;
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float voltage_cell_relative;
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AlgorithmSinglePhaseReference():
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voltage_dc(FP_ZERO),
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current_ampl_limit_const(FP_ZERO),
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current_ampl_pfc_const(FP_ZERO),
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voltage_ampl_real_const(FP_ZERO),
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voltage_ampl_jm_const(FP_ZERO),
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voltage_limit(FP_ZERO),
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voltage_pfc(FP_ZERO),
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voltage_ampl_real(FP_ZERO),
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voltage_ampl_jm(FP_ZERO),
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voltage_cell_ampl_real(FP_ZERO),
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voltage_cell_ampl_jm(FP_ZERO),
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voltage_cell_real(FP_ZERO),
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voltage_cell_jm(FP_ZERO),
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voltage_cell(FP_ZERO),
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voltage_cell_relative(FP_ZERO)
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{}
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};//AlgorithmSinglePhaseReference
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struct AlgorithmSinglePhaseFeedback
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{
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float voltage_ampl_real;
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float voltage_ampl_jm;
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//
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float current_module;
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float current_ampl_real;
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float current_ampl_jm;
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//
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float voltage_cell_dc_reciprocal;
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AlgorithmSinglePhaseFeedback():
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voltage_ampl_real(FP_ZERO),
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voltage_ampl_jm(FP_ZERO),
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current_ampl_real(FP_ZERO),
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current_ampl_jm(FP_ZERO),
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voltage_cell_dc_reciprocal(FP_ZERO)
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{}
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};//AlgorithmSinglePhaseFeedback
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struct AlgorithmSinglePhaseControl
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{
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AlgorithmControlRegister control_bit;
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AlgorithmSinglePhaseReference reference;
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AlgorithmSinglePhaseFeedback feedback;
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AlgorithmSinglePhaseControl():
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control_bit(),
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reference(),
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feedback()
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{}
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};//AlgorithmSinglePhaseControl
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struct AlgorithmPhaseControl
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{
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AlgorithmControlRegister common_control_bit;
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AlgorithmCommonReference common_ref;
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AlgorithmSinglePhaseControl phase_a;
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AlgorithmSinglePhaseControl phase_b;
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AlgorithmSinglePhaseControl phase_c;
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AlgorithmCommonConstants constants;
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AlgorithmPhaseControl():
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common_control_bit(),
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common_ref(),
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phase_a(),
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phase_b(),
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phase_c(),
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constants()
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{}
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};//AlgorithmPhaseControl
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struct AlgorithmStartSinglePhaseReference
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{
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float current_bypass_active;
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float current_bypass_reactive;
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//
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float current_cell_active;
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float current_cell_reactive;
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//
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float voltage_cell_ampl_active;
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float voltage_cell_ampl_reactive;
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//
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float voltage_cell_active;
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float voltage_cell_reactive;
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float voltage_cell;
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float voltage_cell_relative;
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AlgorithmStartSinglePhaseReference():
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current_bypass_active(FP_ZERO),
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current_bypass_reactive(FP_ZERO),
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current_cell_active(FP_ZERO),
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current_cell_reactive(FP_ZERO),
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voltage_cell_ampl_active(FP_ZERO),
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voltage_cell_ampl_reactive(FP_ZERO),
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voltage_cell_active(FP_ZERO),
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voltage_cell_reactive(FP_ZERO),
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voltage_cell(FP_ZERO),
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voltage_cell_relative(FP_ZERO)
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{}
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};//
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struct AlgorithmStartSinglePhaseFeedback
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{
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float current_bypass_active;
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float current_bypass_reactive;
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//
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float current_cell_active;
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float current_cell_reactive;
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AlgorithmStartSinglePhaseFeedback():
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current_bypass_active(FP_ZERO),
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current_bypass_reactive(FP_ZERO),
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current_cell_active(FP_ZERO),
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current_cell_reactive(FP_ZERO)
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{}
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};//
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struct AlgorithmStartSinglePhaseControl
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{
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VectorOrthogonalProjection test_ref;
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AlgorithmStartSinglePhaseReference reference;
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AlgorithmStartSinglePhaseFeedback feedback;
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AlgorithmStartSinglePhaseControl():
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test_ref(),
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reference(),
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feedback()
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{}
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};//
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struct AlgorithmStartPhaseControl
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{
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VectorOrthogonalProjection common_ref;
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AlgorithmStartSinglePhaseControl phase_a;
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AlgorithmStartSinglePhaseControl phase_b;
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AlgorithmStartSinglePhaseControl phase_c;
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AlgorithmStartPhaseControl():
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common_ref(),
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phase_a(),
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phase_b(),
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phase_c()
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{}
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};//
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struct AlgorithmSourceReference
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{
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float voltage;
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float phase_shift;
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AlgorithmSourceReference():
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voltage(FP_ZERO),
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phase_shift(FP_ZERO)
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{}
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};//
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struct EquipmentFaultsBitFieldStructure
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{
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uint16_t remote_e_stop : 1; //0
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uint16_t local_e_stop : 1; //1
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uint16_t fan : 1; //2
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uint16_t cells : 1; //3
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//
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uint16_t temperature_transformer_multi_winding : 1; //4
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uint16_t temperature_transformer_phase_a : 1; //5
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uint16_t temperature_transformer_phase_b : 1; //6
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uint16_t temperature_transformer_phase_c : 1; //7
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//
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uint16_t cabinet_door_open : 1; //8
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uint16_t arc_and_fire : 1; //9
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uint16_t q1 : 1; //10
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uint16_t km1 : 1; //11
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//
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uint16_t km2 : 1; //12
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uint16_t km3 : 1; //13
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uint16_t sync_to_grid : 1; //14
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uint16_t reserved_15 : 1; //15
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};//EquipmentFaultsBitFieldStructure
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union EquipmentFaultsRegister
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{
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uint16_t all;
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struct Register16BitField bit;
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struct EquipmentFaultsBitFieldStructure signal;
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EquipmentFaultsRegister():
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all(uint16_t(0))
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{}
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};//EquipmentFaultsRegister
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struct SystemFaultsRegister
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{
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union PhaseFaultRegister phase_a;
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union PhaseFaultRegister phase_b;
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union PhaseFaultRegister phase_c;
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union EquipmentFaultsRegister equipment;
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SystemFaultsRegister():
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phase_a(),
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phase_b(),
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phase_c(),
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equipment()
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{}
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};//SystemFaultsBitFieldStructure
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class SystemEnvironment
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{
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public:
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//
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IDSOFTWARE id_software;
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//
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float time_sample_control;
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float time_sample_slow;
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float time_sample_additional;
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Uint16 time_prescale_slow;
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Uint16 time_prescale_additional;
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Uint16 time_prescale_symmetrical;
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int16 counter_slow;
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int16 counter_additional;
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int16 counter_symmetrical;
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//
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SYSCTRL::FlashOperationRegister fram_operation;
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SYSCTRL::MonitorDigitalInputSignalRegister fram_burn;
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SYSCTRL::MonitorDigitalInputSignalRegister fram_erase;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister fram_verify;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister fram_read;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister fram_restore;
|
|
//
|
|
AnalogInput analog_input;
|
|
//
|
|
//Analog Signal Scales
|
|
float scale_voltage_grid_a;
|
|
float scale_voltage_grid_b;
|
|
float scale_voltage_grid_c;
|
|
//
|
|
float scale_current_input_a;
|
|
float scale_current_input_b;
|
|
float scale_current_input_c;
|
|
//
|
|
float scale_current_cell_a;
|
|
float scale_current_cell_b;
|
|
float scale_current_cell_c;
|
|
//
|
|
float scale_voltage_load_a;
|
|
float scale_voltage_load_b;
|
|
float scale_voltage_load_c;
|
|
//
|
|
float scale_current_load_a;
|
|
float scale_current_load_b;
|
|
float scale_current_load_c;
|
|
//
|
|
float scale_current_bypass_a;
|
|
float scale_current_bypass_b;
|
|
float scale_current_bypass_c;
|
|
//
|
|
//Analog Signals Offset
|
|
float offset_voltage_grid_a;
|
|
float offset_voltage_grid_b;
|
|
float offset_voltage_grid_c;
|
|
//
|
|
float offset_current_input_a;
|
|
float offset_current_input_b;
|
|
float offset_current_input_c;
|
|
//
|
|
float offset_current_cell_a;
|
|
float offset_current_cell_b;
|
|
float offset_current_cell_c;
|
|
//
|
|
float offset_voltage_load_a;
|
|
float offset_voltage_load_b;
|
|
float offset_voltage_load_c;
|
|
//
|
|
float offset_current_load_a;
|
|
float offset_current_load_b;
|
|
float offset_current_load_c;
|
|
//
|
|
float offset_current_bypass_a;
|
|
float offset_current_bypass_b;
|
|
float offset_current_bypass_c;
|
|
|
|
//
|
|
//Analog Signals Offset Static
|
|
float offset_voltage_grid_static_a;
|
|
float offset_voltage_grid_static_b;
|
|
float offset_voltage_grid_static_c;
|
|
//
|
|
float offset_current_input_static_a;
|
|
float offset_current_input_static_b;
|
|
float offset_current_input_static_c;
|
|
//
|
|
float offset_current_cell_static_a;
|
|
float offset_current_cell_static_b;
|
|
float offset_current_cell_static_c;
|
|
//
|
|
float offset_voltage_load_static_a;
|
|
float offset_voltage_load_static_b;
|
|
float offset_voltage_load_static_c;
|
|
//
|
|
float offset_current_load_static_a;
|
|
float offset_current_load_static_b;
|
|
float offset_current_load_static_c;
|
|
//
|
|
float offset_current_bypass_static_a;
|
|
float offset_current_bypass_static_b;
|
|
float offset_current_bypass_static_c;
|
|
|
|
//
|
|
// ADC Analog Signals
|
|
float adc_voltage_grid_a;
|
|
float adc_voltage_grid_b;
|
|
float adc_voltage_grid_c;
|
|
//
|
|
float adc_current_input_a;
|
|
float adc_current_input_b;
|
|
float adc_current_input_c;
|
|
//
|
|
float adc_current_cell_a;
|
|
float adc_current_cell_b;
|
|
float adc_current_cell_c;
|
|
//
|
|
float adc_voltage_load_a;
|
|
float adc_voltage_load_b;
|
|
float adc_voltage_load_c;
|
|
//
|
|
float adc_current_load_a;
|
|
float adc_current_load_b;
|
|
float adc_current_load_c;
|
|
//
|
|
float adc_current_bypass_a;
|
|
float adc_current_bypass_b;
|
|
float adc_current_bypass_c;
|
|
|
|
//
|
|
// Analog Signals
|
|
float voltage_grid_a;
|
|
float voltage_grid_b;
|
|
float voltage_grid_c;
|
|
//
|
|
float current_input_a;
|
|
float current_input_b;
|
|
float current_input_c;
|
|
//
|
|
float current_cell_a;
|
|
float current_cell_b;
|
|
float current_cell_c;
|
|
//
|
|
float voltage_load_a;
|
|
float voltage_load_b;
|
|
float voltage_load_c;
|
|
//
|
|
float current_load_a;
|
|
float current_load_b;
|
|
float current_load_c;
|
|
//
|
|
float current_bypass_a;
|
|
float current_bypass_b;
|
|
float current_bypass_c;
|
|
//
|
|
#if TYPECONTROL == VECTORCONTROL
|
|
float voltage_grid_alpha;
|
|
float voltage_grid_beta;
|
|
//
|
|
float voltage_grid_direct;
|
|
float voltage_grid_quadrature;
|
|
//
|
|
float voltage_load_alpha;
|
|
float voltage_load_beta;
|
|
//
|
|
float voltage_load_direct;
|
|
float voltage_load_quadrature;
|
|
//
|
|
float current_load_alpha;
|
|
float current_load_beta;
|
|
//
|
|
float current_load_direct;
|
|
float current_load_quadrature;
|
|
//
|
|
float current_bypass_alpha;
|
|
float current_bypass_beta;
|
|
//
|
|
float current_bypass_direct;
|
|
float current_bypass_quadrature;
|
|
//
|
|
float current_cell_alpha;
|
|
float current_cell_beta;
|
|
//
|
|
float current_cell_direct;
|
|
float current_cell_quadrature;
|
|
//
|
|
float current_reference_limit;
|
|
float current_reference_pfc;
|
|
//
|
|
float voltage_reference_limit_high;
|
|
float voltage_reference_load_direct;
|
|
float voltage_reference_load_quadrature;
|
|
float voltage_reference_dc_cell;
|
|
//
|
|
float voltage_pi_reg_out_direct;
|
|
float voltage_pi_reg_out_quadrature;
|
|
//
|
|
float voltage_cell_direct;
|
|
float voltage_cell_quadrature;
|
|
//
|
|
float voltage_cell_alpha;
|
|
float voltage_cell_beta;
|
|
//
|
|
float voltage_cell_a;
|
|
float voltage_cell_b;
|
|
float voltage_cell_c;
|
|
#endif
|
|
|
|
|
|
#if TYPECONTROL == DIRECTREVERSECONTROL
|
|
float drc_voltage_grid_alpha;
|
|
float drc_voltage_grid_beta;
|
|
//
|
|
float drc_voltage_grid_direct;
|
|
float drc_voltage_grid_quadrature;
|
|
//
|
|
float drc_positive_voltage_load_direct;
|
|
float drc_positive_voltage_load_quadrature;
|
|
float drc_negative_voltage_load_direct;
|
|
float drc_negative_voltage_load_quadrature;
|
|
//
|
|
float drc_current_load_alpha;
|
|
float drc_current_load_beta;
|
|
//
|
|
float drc_current_load_direct;
|
|
float drc_current_load_quadrature;
|
|
//
|
|
float drc_current_bypass_alpha;
|
|
float drc_current_bypass_beta;
|
|
//
|
|
float drc_current_bypass_direct;
|
|
float drc_current_bypass_quadrature;
|
|
//
|
|
float drc_current_cell_alpha;
|
|
float drc_current_cell_beta;
|
|
//
|
|
float drc_current_cell_direct;
|
|
float drc_current_cell_quadrature;
|
|
//
|
|
float drc_current_reference_limit;
|
|
float drc_current_reference_pfc;
|
|
//
|
|
float drc_voltage_reference_limit_high;
|
|
float drc_voltage_reference_load_direct;
|
|
float drc_voltage_reference_load_quadrature;
|
|
float drc_voltage_reference_zero;
|
|
float drc_voltage_reference_dc_cell;
|
|
//
|
|
float drc_positive_voltage_cell_direct;
|
|
float drc_positive_voltage_cell_quadrature;
|
|
float drc_negative_voltage_cell_direct;
|
|
float drc_negative_voltage_cell_quadrature;
|
|
//
|
|
float drc_positive_voltage_cell_alpha;
|
|
float drc_positive_voltage_cell_beta;
|
|
float drc_negative_voltage_cell_alpha;
|
|
float drc_negative_voltage_cell_beta;
|
|
//
|
|
float drc_positive_voltage_cell_a;
|
|
float drc_positive_voltage_cell_b;
|
|
float drc_positive_voltage_cell_c;
|
|
//
|
|
float drc_negative_voltage_cell_a;
|
|
float drc_negative_voltage_cell_b;
|
|
float drc_negative_voltage_cell_c;
|
|
//
|
|
float drc_voltage_cell_a;
|
|
float drc_voltage_cell_b;
|
|
float drc_voltage_cell_c;
|
|
#endif
|
|
|
|
|
|
//
|
|
// Reference Vector
|
|
float reference_phase_a;
|
|
float reference_phase_b;
|
|
float reference_phase_c;
|
|
//
|
|
float reference_phase_alpha;
|
|
float reference_phase_betta;
|
|
//
|
|
float reference_phase_d;
|
|
float reference_phase_q;
|
|
|
|
//Scale Compute
|
|
SYSCTRL::ScaleComputeCommandRegister scale_compute_voltage_command;
|
|
SYSCTRL::ScaleComputeCommandRegister scale_compute_current_command;
|
|
SYSCTRL::ScaleCompute scale_compute_voltage_input;
|
|
SYSCTRL::ScaleCompute scale_compute_voltage_load;
|
|
SYSCTRL::ScaleCompute scale_compute_current_input;
|
|
SYSCTRL::ScaleCompute scale_compute_current_cell;
|
|
SYSCTRL::ScaleCompute scale_compute_current_load;
|
|
SYSCTRL::ScaleCompute scale_compute_current_bypass;
|
|
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure spinner_phase_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure spinner_phase_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure spinner_phase_c;
|
|
//
|
|
SYSCTRL::VecorModuleStructure module_voltage_phase_a;
|
|
SYSCTRL::VecorModuleStructure module_voltage_phase_b;
|
|
SYSCTRL::VecorModuleStructure module_voltage_phase_c;
|
|
//
|
|
|
|
//Signal Decompose
|
|
SYSCTRL::RelativeAnalogSignalStructure relative_voltage_input_a;
|
|
SYSCTRL::RelativeAnalogSignalStructure relative_voltage_input_b;
|
|
SYSCTRL::RelativeAnalogSignalStructure relative_voltage_input_c;
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_input_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_input_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_input_c;
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_load_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_load_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_voltage_load_c;
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_load_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_load_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_load_c;
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_cell_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_cell_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_cell_c;
|
|
//
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_bypass_a;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_bypass_b;
|
|
SYSCTRL::ProjectionAnalogSignalStructure projection_current_bypass_c;
|
|
|
|
// SYSCTRL::ProjectionAnalogSignalStructure test_projection_a;
|
|
// SYSCTRL::ProjectionAnalogSignalStructure test_projection_b;
|
|
// SYSCTRL::ProjectionAnalogSignalStructure test_projection_c;
|
|
//
|
|
//Symmetrical Components
|
|
SYSCTRL::SymmetricalComponentsStructure symmetrical_components_voltage_input;
|
|
SYSCTRL::SymmetricalComponentsStructure symmetrical_components_voltage_load;
|
|
SYSCTRL::SymmetricalComponentsStructure symmetrical_components_current_load;
|
|
SYSCTRL::SymmetricalComponentsStructure symmetrical_components_current_bypass;
|
|
|
|
//RMS value of Analog Signals
|
|
float rms_voltage_input_ab;
|
|
float rms_voltage_input_bc;
|
|
float rms_voltage_input_ca;
|
|
float rms_voltage_input_module;
|
|
//
|
|
float rms_voltage_load_ab;
|
|
float rms_voltage_load_bc;
|
|
float rms_voltage_load_ca;
|
|
float rms_voltage_load_module;
|
|
//
|
|
float rms_current_input_a;
|
|
float rms_current_input_b;
|
|
float rms_current_input_c;
|
|
float rms_current_input_module;
|
|
//
|
|
float rms_current_load_a;
|
|
float rms_current_load_b;
|
|
float rms_current_load_c;
|
|
float rms_current_load_module;
|
|
//
|
|
float rms_current_bypass_a;
|
|
float rms_current_bypass_b;
|
|
float rms_current_bypass_c;
|
|
float rms_current_bypass_module;
|
|
//
|
|
float rms_current_cell_a;
|
|
float rms_current_cell_b;
|
|
float rms_current_cell_c;
|
|
//
|
|
|
|
//High Voltage Cells
|
|
SYSCTRL::HardWare hardware;
|
|
float cell_dc_voltage_a;
|
|
float cell_dc_voltage_b;
|
|
float cell_dc_voltage_c;
|
|
float cell_dc_voltage_a_average;
|
|
float cell_dc_voltage_b_average;
|
|
float cell_dc_voltage_c_average;
|
|
float cell_dc_voltage_a_reciprocal;
|
|
float cell_dc_voltage_b_reciprocal;
|
|
float cell_dc_voltage_c_reciprocal;
|
|
//
|
|
|
|
//System State
|
|
SYSCTRL::BoolRegister system_alarm;
|
|
SYSCTRL::BoolRegister system_fault;
|
|
SYSCTRL::BoolRegister system_reset;
|
|
SYSCTRL::BoolRegister system_ready;
|
|
SYSCTRL::BoolRegister short_circuit;
|
|
SYSCTRL::BoolRegister enable_work;
|
|
SYSCTRL::BoolRegister enable_work_previous;
|
|
SYSCTRL::BoolRegister enable_work_is_on;
|
|
SYSCTRL::BoolRegister enable_work_is_off;
|
|
SYSCTRL::BoolRegister enable_work_reset;
|
|
SYSCTRL::SystemFaultsRegister system_faults_register;
|
|
|
|
|
|
//External Command
|
|
SYSCTRL::ExternalCommandWordRegister external_command_word;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_start;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_stop;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_reset;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_e_stop;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_km1_on;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_km1_off;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_km3_on;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_km3_off;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_q1_on;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister external_q1_off;
|
|
|
|
//
|
|
// PLL
|
|
float grid_frequency;
|
|
bool status_pll_sync;
|
|
//
|
|
|
|
//Generator Orts // FOR DEBUG
|
|
float gen_ort_a;
|
|
float gen_ort_b;
|
|
float gen_ort_c;
|
|
float gen_ort_alpha;
|
|
float gen_ort_beta;
|
|
|
|
//System Orts
|
|
SystemABCOrts pll_abc_orts;
|
|
SystemABCOrts twisted_abc_orts;
|
|
SystemABCOrts main_abc_orts;
|
|
SystemABCOrts main_abc_reverse_orts;
|
|
VectorOrthogonalProjection main_ab_orts;
|
|
//
|
|
VectorOrthogonalProjection harmonica_2;
|
|
VectorOrthogonalProjection harmonica_3;
|
|
VectorOrthogonalProjection harmonica_5;
|
|
VectorOrthogonalProjection harmonica_7;
|
|
VectorOrthogonalProjection harmonica_9;
|
|
VectorOrthogonalProjection harmonica_11;
|
|
|
|
// Algorithm Control
|
|
SYSCTRL::AlgorithmControlRegister algorithm_control;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister enable_current_limit;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister enable_pfc;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister enable_harmonica;
|
|
SYSCTRL::MonitorDigitalInputSignalRegister enable_auto_offset;
|
|
bool allow_auto_offset;
|
|
|
|
// AlgorithmPhaseControl
|
|
#if TYPECONTROL == SCALARCONTROL
|
|
AlgorithmPhaseControl phase_control;
|
|
AlgorithmStartPhaseControl start_control;
|
|
#endif
|
|
|
|
|
|
#if TYPECONTROL == DIRECTREVERSECONTROL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
//AlgorithmSource
|
|
AlgorithmSourceReference algorithm_source_references;
|
|
|
|
// Harmonica Analyzer
|
|
FLTSYSLIB::HarmonicaStructure voltage_input_a_harmonica_5;
|
|
FLTSYSLIB::HarmonicaStructure voltage_input_b_harmonica_5;
|
|
FLTSYSLIB::HarmonicaStructure voltage_input_c_harmonica_5;
|
|
|
|
// Framework data
|
|
OutputDiscteteSignalsRegister digital_output_inverse;
|
|
OutputDiscteteSignalsRegister digital_output;
|
|
//OutputDiscteteSignalsRegister digital_output_debug_only;
|
|
OutputDiscteteSignalsRegister digital_output_temp;
|
|
//DigitalOuput digital_output_inverse;
|
|
//DigitalOuput digital_output;
|
|
//DigitalOuput digital_output_temp;
|
|
DigitalInput digital_input;
|
|
|
|
|
|
// Phase Alert Monitor
|
|
SYSCTRL::PhaseAlertRegister phase_alert_monitor_register;
|
|
|
|
//Fan Control
|
|
SYSCTRL::FanTimerControl fan_control;
|
|
//
|
|
|
|
// DIGITAL INPUTS
|
|
FLTSYSLIB::DigitalInputAntiNoise remote_start; //3001
|
|
FLTSYSLIB::DigitalInputAntiNoise remote_stop; //3002
|
|
FLTSYSLIB::DigitalInputAntiNoise remote_reset; //3003
|
|
FLTSYSLIB::DigitalInputAntiNoise remote_e_stop; //3004
|
|
FLTSYSLIB::DigitalInputAntiNoise auxiliary_q1; //3005
|
|
FLTSYSLIB::DigitalInputAntiNoise bypass_ready; //3006
|
|
FLTSYSLIB::DigitalInputAntiNoise transformer_inv_over_temperature_alarm; //3007
|
|
FLTSYSLIB::DigitalInputAntiNoise local_e_stop; //3008
|
|
FLTSYSLIB::DigitalInputAntiNoise cabinet_door_interlocked; //3009
|
|
FLTSYSLIB::DigitalInputAntiNoise arc_and_fire; //3010
|
|
FLTSYSLIB::DigitalInputAntiNoise hw_dvr_ready; //3011
|
|
FLTSYSLIB::DigitalInputAntiNoise auxiliary_km2; //3012
|
|
FLTSYSLIB::DigitalInputAntiNoise auxiliary_km11; //3013
|
|
FLTSYSLIB::DigitalInputAntiNoise transformer_t_over_temperature_fault;//3014
|
|
FLTSYSLIB::DigitalInputAntiNoise control_power_supply_status; //3015
|
|
FLTSYSLIB::DigitalInputAntiNoise auxiliary_km1; //3016
|
|
FLTSYSLIB::DigitalInputAntiNoise auxiliary_km3; //3017
|
|
FLTSYSLIB::DigitalInputAntiNoise transformer_inv_over_temperature_fault; //3018
|
|
FLTSYSLIB::DigitalInputAntiNoise fan_fault; //3019
|
|
FLTSYSLIB::DigitalInputAntiNoise local_remote; //3020 off-local/on-remote
|
|
|
|
|
|
|
|
SYSCTRL::InputDiscreteSignals input_discrete;
|
|
DigitalInput digital_input_debug;
|
|
//SYSCTRL::InputDiscreteSignals input_discrete_debug_only;
|
|
//
|
|
|
|
// ABC-Generator
|
|
FLTSYSLIB::GeneratorABC generator_abc;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_inp_volt;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_out_volt;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_out_current;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_input_current;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_bypass_current;
|
|
//SYSCTRL::GeneratorSymmetricalComponents gen_symm_comp_cell_current;
|
|
// Reference PWM-Generator
|
|
//float amplitude_generator_pwm;
|
|
//FLTSYSLIB::GeneratorABC generator_pwm;
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//Phase Voltage Regulators - Normal & Stop Algorithms
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//
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//
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#if TYPECONTROL == VECTORCONTROL
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//
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FLTSYSLIB::PIController regulator_voltage_load_direct;
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FLTSYSLIB::PIController regulator_voltage_load_quadrature;
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//
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FLTSYSLIB::Integrator integrator_direct;
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FLTSYSLIB::Integrator integrator_quadrature;
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//
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FLTSYSLIB::Filter reference_voltage_direct_intensity;
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//
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#if TYPECURRENTCONTROLLER == CURRENTCONTROLLER_PI
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FLTSYSLIB::PIController regulator_current_load_direct;
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FLTSYSLIB::PIController regulator_current_load_quadrature;
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#endif
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#if TYPECURRENTCONTROLLER == CURRENTCONTROLLER_P
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FLTSYSLIB::PController regulator_current_load_direct;
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FLTSYSLIB::PController regulator_current_load_quadrature;
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#endif
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//
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FLTSYSLIB::IController referencer_current_bypass_direct;
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FLTSYSLIB::IController referencer_current_bypass_quadrature;
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//
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FLTSYSLIB::IController regulator_current_limit;
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FLTSYSLIB::PIController regulator_current_pfc;
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//
|
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#endif
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#if TYPECONTROL == SCALARCONTROL
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//
|
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FLTSYSLIB::PIController regulator_voltage_load_a_active;
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FLTSYSLIB::PIController regulator_voltage_load_a_reactive;
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//
|
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FLTSYSLIB::PIController regulator_voltage_load_b_active;
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FLTSYSLIB::PIController regulator_voltage_load_b_reactive;
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|
//
|
|
FLTSYSLIB::PIController regulator_voltage_load_c_active;
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FLTSYSLIB::PIController regulator_voltage_load_c_reactive;
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//
|
|
//Load Current Regulators
|
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FLTSYSLIB::PIController regulator_current_limit_a;
|
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FLTSYSLIB::PIController regulator_current_pfc_a;
|
|
//
|
|
FLTSYSLIB::PIController regulator_current_limit_b;
|
|
FLTSYSLIB::PIController regulator_current_pfc_b;
|
|
//
|
|
FLTSYSLIB::PIController regulator_current_limit_c;
|
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FLTSYSLIB::PIController regulator_current_pfc_c;
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|
//
|
|
//Current Regulators - Start Algorithm
|
|
FLTSYSLIB::PIController current_regulator_a_active;
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FLTSYSLIB::PIController current_regulator_a_reactive;
|
|
//
|
|
FLTSYSLIB::PIController current_regulator_b_active;
|
|
FLTSYSLIB::PIController current_regulator_b_reactive;
|
|
//
|
|
FLTSYSLIB::PIController current_regulator_c_active;
|
|
FLTSYSLIB::PIController current_regulator_c_reactive;
|
|
//
|
|
//Current Referencer - Start Algorithm
|
|
FLTSYSLIB::PIController current_referencer_a_active;
|
|
FLTSYSLIB::PIController current_referencer_a_reactive;
|
|
//
|
|
FLTSYSLIB::PIController current_referencer_b_active;
|
|
FLTSYSLIB::PIController current_referencer_b_reactive;
|
|
//
|
|
FLTSYSLIB::PIController current_referencer_c_active;
|
|
FLTSYSLIB::PIController current_referencer_c_reactive;
|
|
//
|
|
//POWER CELL DC Voltage Regulator
|
|
FLTSYSLIB::PIController regulator_dc_a;
|
|
FLTSYSLIB::PIController regulator_dc_b;
|
|
FLTSYSLIB::PIController regulator_dc_c;
|
|
//
|
|
#endif
|
|
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|
|
#if TYPECONTROL == DIRECTREVERSECONTROL
|
|
//
|
|
FLTSYSLIB::PIController drc_positive_voltage_controller_direct;
|
|
FLTSYSLIB::PIController drc_positive_voltage_controller_quadrature;
|
|
FLTSYSLIB::PIController drc_negative_voltage_controller_direct;
|
|
FLTSYSLIB::PIController drc_negative_voltage_controller_quadrature;
|
|
//
|
|
FLTSYSLIB::FilterSecond drc_reference_voltage_direct_intensity;
|
|
//
|
|
FLTSYSLIB::PIController drc_regulator_current_load_direct;
|
|
FLTSYSLIB::PIController drc_regulator_current_load_quadrature;
|
|
//
|
|
FLTSYSLIB::IController drc_referencer_current_bypass_direct;
|
|
FLTSYSLIB::IController drc_referencer_current_bypass_quadrature;
|
|
//
|
|
FLTSYSLIB::IController drc_regulator_current_limit;
|
|
FLTSYSLIB::PIController drc_regulator_current_pfc;
|
|
//
|
|
SYSCTRL::DRCDecomposer drc_direct_voltage_decomposer;
|
|
SYSCTRL::DRCDecomposer drc_back_voltage_decomposer;
|
|
#endif
|
|
|
|
//
|
|
// Timers
|
|
FLTSYSLIB::FTimer timer_start;
|
|
FLTSYSLIB::FTimer timer_stop;
|
|
//
|
|
public:
|
|
SystemEnvironment();
|
|
//
|
|
};//SystemEnvironment
|
|
|
|
} /* namespace SYSCTRL */
|
|
|
|
#endif /* SYSCTRL_SYSTEMENVIRONMENT_H_ */
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