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/*
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* SystemEnvironment.cpp
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*
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* Author: Aleksey Gerasimenko
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* gerasimenko.aleksey.n@gmail.com
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*/
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#include "SYSCTRL/SystemEnvironment.h"
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namespace SYSCTRL
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{
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//CONSTRUCTOR
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SystemEnvironment::SystemEnvironment():
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id_software(),
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time_sample_control(-1.0),
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time_sample_slow(-1.0),
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time_sample_additional(-1.0),
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time_prescale_slow(0),
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time_prescale_additional(0),
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time_prescale_symmetrical((Uint16)14325),
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counter_slow(0),
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counter_additional(0),
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counter_symmetrical(333),
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//
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fram_operation(),
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fram_burn(),
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fram_erase(),
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fram_verify(),
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fram_read(),
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fram_restore(),
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//
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analog_input(),
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//
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scale_voltage_grid_a(1.0),
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scale_voltage_grid_b(1.0),
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scale_voltage_grid_c(1.0),
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//
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scale_current_input_a(1.0),
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scale_current_input_b(1.0),
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scale_current_input_c(1.0),
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//
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scale_current_cell_a(1.0),
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scale_current_cell_b(1.0),
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scale_current_cell_c(1.0),
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//
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scale_voltage_load_a(1.0),
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scale_voltage_load_b(1.0),
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scale_voltage_load_c(1.0),
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//
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scale_current_load_a(1.0),
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scale_current_load_b(1.0),
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scale_current_load_c(1.0),
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//
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scale_current_bypass_a(1.0),
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scale_current_bypass_b(1.0),
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scale_current_bypass_c(1.0),
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//
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//
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offset_voltage_grid_a(FP_ZERO),
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offset_voltage_grid_b(FP_ZERO),
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offset_voltage_grid_c(FP_ZERO),
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//
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offset_current_input_a(FP_ZERO),
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offset_current_input_b(FP_ZERO),
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offset_current_input_c(FP_ZERO),
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//
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offset_current_cell_a(FP_ZERO),
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offset_current_cell_b(FP_ZERO),
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offset_current_cell_c(FP_ZERO),
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//
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offset_voltage_load_a(FP_ZERO),
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offset_voltage_load_b(FP_ZERO),
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offset_voltage_load_c(FP_ZERO),
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//
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offset_current_load_a(FP_ZERO),
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offset_current_load_b(FP_ZERO),
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offset_current_load_c(FP_ZERO),
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//
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offset_current_bypass_a(FP_ZERO),
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offset_current_bypass_b(FP_ZERO),
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offset_current_bypass_c(FP_ZERO),
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//
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//
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offset_voltage_grid_static_a(FP_ZERO),
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offset_voltage_grid_static_b(FP_ZERO),
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offset_voltage_grid_static_c(FP_ZERO),
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//
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offset_current_input_static_a(FP_ZERO),
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offset_current_input_static_b(FP_ZERO),
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offset_current_input_static_c(FP_ZERO),
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//
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offset_current_cell_static_a(FP_ZERO),
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offset_current_cell_static_b(FP_ZERO),
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offset_current_cell_static_c(FP_ZERO),
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//
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offset_voltage_load_static_a(FP_ZERO),
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offset_voltage_load_static_b(FP_ZERO),
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offset_voltage_load_static_c(FP_ZERO),
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//
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offset_current_load_static_a(FP_ZERO),
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offset_current_load_static_b(FP_ZERO),
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offset_current_load_static_c(FP_ZERO),
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//
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offset_current_bypass_static_a(FP_ZERO),
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offset_current_bypass_static_b(FP_ZERO),
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offset_current_bypass_static_c(FP_ZERO),
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//
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//
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adc_voltage_grid_a(FP_ZERO),
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adc_voltage_grid_b(FP_ZERO),
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adc_voltage_grid_c(FP_ZERO),
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//
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adc_current_input_a(FP_ZERO),
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adc_current_input_b(FP_ZERO),
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adc_current_input_c(FP_ZERO),
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//
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adc_current_cell_a(FP_ZERO),
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adc_current_cell_b(FP_ZERO),
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adc_current_cell_c(FP_ZERO),
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//
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adc_voltage_load_a(FP_ZERO),
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adc_voltage_load_b(FP_ZERO),
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adc_voltage_load_c(FP_ZERO),
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//
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adc_current_load_a(FP_ZERO),
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adc_current_load_b(FP_ZERO),
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adc_current_load_c(FP_ZERO),
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//
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adc_current_bypass_a(FP_ZERO),
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adc_current_bypass_b(FP_ZERO),
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adc_current_bypass_c(FP_ZERO),
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//
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//
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voltage_grid_a(FP_ZERO),
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voltage_grid_b(FP_ZERO),
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voltage_grid_c(FP_ZERO),
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//
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current_input_a(FP_ZERO),
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current_input_b(FP_ZERO),
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current_input_c(FP_ZERO),
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//
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current_cell_a(FP_ZERO),
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current_cell_b(FP_ZERO),
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current_cell_c(FP_ZERO),
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//
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current_bypass_a(FP_ZERO),
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current_bypass_b(FP_ZERO),
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current_bypass_c(FP_ZERO),
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//
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voltage_load_a(FP_ZERO),
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voltage_load_b(FP_ZERO),
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voltage_load_c(FP_ZERO),
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//
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current_load_a(FP_ZERO),
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current_load_b(FP_ZERO),
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current_load_c(FP_ZERO),
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//
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#if TYPECONTROL == VECTORCONTROL
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voltage_grid_alpha(FP_ZERO),
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voltage_grid_beta(FP_ZERO),
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//
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voltage_grid_direct(FP_ZERO),
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voltage_grid_quadrature(FP_ZERO),
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//
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voltage_load_alpha(FP_ZERO),
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voltage_load_beta(FP_ZERO),
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//
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voltage_load_direct(FP_ZERO),
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voltage_load_quadrature(FP_ZERO),
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//
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current_load_alpha(FP_ZERO),
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current_load_beta(FP_ZERO),
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//
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current_load_direct(FP_ZERO),
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current_load_quadrature(FP_ZERO),
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//
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current_bypass_alpha(FP_ZERO),
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current_bypass_beta(FP_ZERO),
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//
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current_bypass_direct(FP_ZERO),
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current_bypass_quadrature(FP_ZERO),
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//
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current_cell_alpha(FP_ZERO),
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current_cell_beta(FP_ZERO),
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//
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current_cell_direct(FP_ZERO),
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current_cell_quadrature(FP_ZERO),
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//
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current_reference_limit(FP_ZERO),
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current_reference_pfc(FP_ZERO),
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//
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voltage_reference_limit_high(FP_ZERO),
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voltage_reference_load_direct(FP_ZERO),
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voltage_reference_load_quadrature(FP_ZERO),
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voltage_reference_dc_cell(FP_ZERO),
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//
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voltage_pi_reg_out_direct(FP_ZERO),
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voltage_pi_reg_out_quadrature(FP_ZERO),
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//
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voltage_cell_direct(FP_ZERO),
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voltage_cell_quadrature(FP_ZERO),
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//
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voltage_cell_alpha(FP_ZERO),
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voltage_cell_beta(FP_ZERO),
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//
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voltage_cell_a(FP_ZERO),
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voltage_cell_b(FP_ZERO),
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voltage_cell_c(FP_ZERO),
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#endif
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#if TYPECONTROL == DIRECTREVERSECONTROL
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drc_voltage_grid_alpha(FP_ZERO),
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drc_voltage_grid_beta(FP_ZERO),
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//
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drc_voltage_grid_direct(FP_ZERO),
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drc_voltage_grid_quadrature(FP_ZERO),
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//
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drc_positive_voltage_load_direct(FP_ZERO),
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drc_positive_voltage_load_quadrature(FP_ZERO),
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drc_negative_voltage_load_direct(FP_ZERO),
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drc_negative_voltage_load_quadrature(FP_ZERO),
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//
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drc_current_load_alpha(FP_ZERO),
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drc_current_load_beta(FP_ZERO),
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//
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drc_current_load_direct(FP_ZERO),
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drc_current_load_quadrature(FP_ZERO),
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//
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drc_current_bypass_alpha(FP_ZERO),
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drc_current_bypass_beta(FP_ZERO),
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//
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drc_current_bypass_direct(FP_ZERO),
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drc_current_bypass_quadrature(FP_ZERO),
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//
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drc_current_cell_alpha(FP_ZERO),
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drc_current_cell_beta(FP_ZERO),
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//
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drc_current_cell_direct(FP_ZERO),
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drc_current_cell_quadrature(FP_ZERO),
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//
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drc_current_reference_limit(FP_ZERO),
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drc_current_reference_pfc(FP_ZERO),
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//
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drc_voltage_reference_limit_high(FP_ZERO),
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drc_voltage_reference_load_direct(FP_ZERO),
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drc_voltage_reference_load_quadrature(FP_ZERO),
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drc_voltage_reference_dc_cell(FP_ZERO),
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drc_voltage_reference_zero(FP_ZERO),
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//
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drc_positive_voltage_cell_direct(FP_ZERO),
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drc_positive_voltage_cell_quadrature(FP_ZERO),
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drc_negative_voltage_cell_direct(FP_ZERO),
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drc_negative_voltage_cell_quadrature(FP_ZERO),
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//
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drc_positive_voltage_cell_alpha(FP_ZERO),
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drc_positive_voltage_cell_beta(FP_ZERO),
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drc_negative_voltage_cell_alpha(FP_ZERO),
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drc_negative_voltage_cell_beta(FP_ZERO),
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//
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drc_positive_voltage_cell_a(FP_ZERO),
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drc_positive_voltage_cell_b(FP_ZERO),
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drc_positive_voltage_cell_c(FP_ZERO),
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//
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drc_negative_voltage_cell_a(FP_ZERO),
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drc_negative_voltage_cell_b(FP_ZERO),
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drc_negative_voltage_cell_c(FP_ZERO),
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//
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drc_voltage_cell_a(FP_ZERO),
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drc_voltage_cell_b(FP_ZERO),
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drc_voltage_cell_c(FP_ZERO),
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#endif
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reference_phase_a(FP_ZERO),
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reference_phase_b(FP_ZERO),
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reference_phase_c(FP_ZERO),
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//
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reference_phase_alpha(FP_ZERO),
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reference_phase_betta(FP_ZERO),
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//
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reference_phase_d(FP_ZERO),
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reference_phase_q(FP_ZERO),
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//
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scale_compute_voltage_command(),
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scale_compute_current_command(),
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scale_compute_voltage_input(this->rms_voltage_input_ab,
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this->rms_voltage_input_bc,
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this->rms_voltage_input_ca,
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this->scale_voltage_grid_a,
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this->scale_voltage_grid_b,
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this->scale_voltage_grid_c),
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scale_compute_voltage_load(this->rms_voltage_load_ab,
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this->rms_voltage_load_bc,
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this->rms_voltage_load_ca,
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this->scale_voltage_load_a,
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this->scale_voltage_load_b,
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this->scale_voltage_load_c),
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scale_compute_current_input(this->rms_current_input_a,
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this->rms_current_input_b,
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this->rms_current_input_c,
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this->scale_current_input_a,
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this->scale_current_input_b,
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this->scale_current_input_c),
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scale_compute_current_cell(this->rms_current_cell_a,
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this->rms_current_cell_b,
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this->rms_current_cell_c,
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|
this->scale_current_cell_a,
|
|
|
|
|
this->scale_current_cell_b,
|
|
|
|
|
this->scale_current_cell_c),
|
|
|
|
|
scale_compute_current_load(this->rms_current_load_a,
|
|
|
|
|
this->rms_current_load_b,
|
|
|
|
|
this->rms_current_load_c,
|
|
|
|
|
this->scale_current_load_a,
|
|
|
|
|
this->scale_current_load_b,
|
|
|
|
|
this->scale_current_load_c),
|
|
|
|
|
scale_compute_current_bypass(this->rms_current_bypass_a,
|
|
|
|
|
this->rms_current_bypass_b,
|
|
|
|
|
this->rms_current_bypass_c,
|
|
|
|
|
this->scale_current_bypass_a,
|
|
|
|
|
this->scale_current_bypass_b,
|
|
|
|
|
this->scale_current_bypass_c),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
spinner_phase_a(),
|
|
|
|
|
spinner_phase_b(),
|
|
|
|
|
spinner_phase_c(),
|
|
|
|
|
//
|
|
|
|
|
module_voltage_phase_a(),
|
|
|
|
|
module_voltage_phase_b(),
|
|
|
|
|
module_voltage_phase_c(),
|
|
|
|
|
//
|
|
|
|
|
|
|
|
|
|
//Signal Decompose
|
|
|
|
|
relative_voltage_input_a(),
|
|
|
|
|
relative_voltage_input_b(),
|
|
|
|
|
relative_voltage_input_c(),
|
|
|
|
|
//
|
|
|
|
|
projection_voltage_input_a(),
|
|
|
|
|
projection_voltage_input_b(),
|
|
|
|
|
projection_voltage_input_c(),
|
|
|
|
|
//
|
|
|
|
|
projection_voltage_load_a(),
|
|
|
|
|
projection_voltage_load_b(),
|
|
|
|
|
projection_voltage_load_c(),
|
|
|
|
|
//
|
|
|
|
|
projection_current_load_a(),
|
|
|
|
|
projection_current_load_b(),
|
|
|
|
|
projection_current_load_c(),
|
|
|
|
|
//
|
|
|
|
|
projection_current_cell_a(),
|
|
|
|
|
projection_current_cell_b(),
|
|
|
|
|
projection_current_cell_c(),
|
|
|
|
|
//
|
|
|
|
|
projection_current_bypass_a(),
|
|
|
|
|
projection_current_bypass_b(),
|
|
|
|
|
projection_current_bypass_c(),
|
|
|
|
|
|
|
|
|
|
// test_projection_a(),
|
|
|
|
|
// test_projection_b(),
|
|
|
|
|
// test_projection_c(),
|
|
|
|
|
|
|
|
|
|
//Symmetrical Components
|
|
|
|
|
symmetrical_components_voltage_input(),
|
|
|
|
|
symmetrical_components_voltage_load(),
|
|
|
|
|
symmetrical_components_current_load(),
|
|
|
|
|
symmetrical_components_current_bypass(),
|
|
|
|
|
|
|
|
|
|
//
|
|
|
|
|
//RMS value
|
|
|
|
|
//
|
|
|
|
|
rms_voltage_input_ab(FP_ZERO),
|
|
|
|
|
rms_voltage_input_bc(FP_ZERO),
|
|
|
|
|
rms_voltage_input_ca(FP_ZERO),
|
|
|
|
|
rms_voltage_input_module(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
rms_voltage_load_ab(FP_ZERO),
|
|
|
|
|
rms_voltage_load_bc(FP_ZERO),
|
|
|
|
|
rms_voltage_load_ca(FP_ZERO),
|
|
|
|
|
rms_voltage_load_module(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
rms_current_input_a(FP_ZERO),
|
|
|
|
|
rms_current_input_b(FP_ZERO),
|
|
|
|
|
rms_current_input_c(FP_ZERO),
|
|
|
|
|
rms_current_input_module(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
rms_current_load_a(FP_ZERO),
|
|
|
|
|
rms_current_load_b(FP_ZERO),
|
|
|
|
|
rms_current_load_c(FP_ZERO),
|
|
|
|
|
rms_current_load_module(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
rms_current_bypass_a(FP_ZERO),
|
|
|
|
|
rms_current_bypass_b(FP_ZERO),
|
|
|
|
|
rms_current_bypass_c(FP_ZERO),
|
|
|
|
|
rms_current_bypass_module(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
rms_current_cell_a(FP_ZERO),
|
|
|
|
|
rms_current_cell_b(FP_ZERO),
|
|
|
|
|
rms_current_cell_c(FP_ZERO),
|
|
|
|
|
//
|
|
|
|
|
hardware(),
|
|
|
|
|
cell_dc_voltage_a(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_b(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_c(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_a_average(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_b_average(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_c_average(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_a_reciprocal(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_b_reciprocal(FP_ZERO),
|
|
|
|
|
cell_dc_voltage_c_reciprocal(FP_ZERO),
|
|
|
|
|
|
|
|
|
|
system_alarm(),
|
|
|
|
|
system_fault(),
|
|
|
|
|
system_reset(),
|
|
|
|
|
system_ready(),
|
|
|
|
|
short_circuit(),
|
|
|
|
|
enable_work(),
|
|
|
|
|
enable_work_previous(),
|
|
|
|
|
enable_work_is_on(),
|
|
|
|
|
enable_work_is_off(),
|
|
|
|
|
enable_work_reset(),
|
|
|
|
|
system_faults_register(),
|
|
|
|
|
|
|
|
|
|
external_command_word(),
|
|
|
|
|
external_start(),
|
|
|
|
|
external_stop(),
|
|
|
|
|
external_reset(),
|
|
|
|
|
external_e_stop(),
|
|
|
|
|
external_km1_on(0),
|
|
|
|
|
external_km1_off(),
|
|
|
|
|
external_km3_on(),
|
|
|
|
|
external_km3_off(),
|
|
|
|
|
external_q1_on(),
|
|
|
|
|
external_q1_off(),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
gen_ort_a(FP_ZERO),
|
|
|
|
|
gen_ort_b(FP_ZERO),
|
|
|
|
|
gen_ort_c(FP_ZERO),
|
|
|
|
|
gen_ort_alpha(FP_ZERO),
|
|
|
|
|
gen_ort_beta(FP_ZERO),
|
|
|
|
|
|
|
|
|
|
grid_frequency(FP_ZERO),
|
|
|
|
|
status_pll_sync(false),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//PLL-ABC
|
|
|
|
|
pll_abc_orts(),
|
|
|
|
|
main_abc_orts(),
|
|
|
|
|
main_abc_reverse_orts(),
|
|
|
|
|
twisted_abc_orts(),
|
|
|
|
|
main_ab_orts(),
|
|
|
|
|
harmonica_2(),
|
|
|
|
|
harmonica_3(),
|
|
|
|
|
harmonica_5(),
|
|
|
|
|
harmonica_7(),
|
|
|
|
|
harmonica_9(),
|
|
|
|
|
harmonica_11(),
|
|
|
|
|
|
|
|
|
|
//Algorithm Control
|
|
|
|
|
algorithm_control(),
|
|
|
|
|
enable_current_limit(),
|
|
|
|
|
enable_pfc(),
|
|
|
|
|
enable_harmonica(),
|
|
|
|
|
enable_auto_offset(),
|
|
|
|
|
allow_auto_offset(false),
|
|
|
|
|
|
|
|
|
|
//AlgorithmPhaseControl
|
|
|
|
|
#if TYPECONTROL == SCALARCONTROL
|
|
|
|
|
phase_control(),
|
|
|
|
|
start_control(),
|
|
|
|
|
#endif
|
|
|
|
|
algorithm_source_references(),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//Harmonica Analyzer
|
|
|
|
|
voltage_input_a_harmonica_5(),
|
|
|
|
|
voltage_input_b_harmonica_5(),
|
|
|
|
|
voltage_input_c_harmonica_5(),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//Framework data
|
|
|
|
|
digital_output_inverse(),
|
|
|
|
|
digital_output(),
|
|
|
|
|
digital_input(),
|
|
|
|
|
digital_output_temp(),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//Phase Alarm monitor
|
|
|
|
|
phase_alert_monitor_register(),
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
//Fan Control
|
|
|
|
|
fan_control(),
|
|
|
|
|
|
|
|
|
|
//
|
|
|
|
|
//digital inputs
|
|
|
|
|
remote_start(), //3001
|
|
|
|
|
remote_stop(), //3002
|
|
|
|
|
remote_reset(), //3003
|
|
|
|
|
remote_e_stop(), //3004
|
|
|
|
|
auxiliary_q1(), //3005
|
|
|
|
|
bypass_ready(), //3006
|
|
|
|
|
transformer_inv_over_temperature_alarm(), //3007
|
|
|
|
|
local_e_stop(), //3008
|
|
|
|
|
cabinet_door_interlocked(), //3009
|
|
|
|
|
arc_and_fire(),//3010
|
|
|
|
|
hw_dvr_ready(), //3011
|
|
|
|
|
auxiliary_km2(), //3012
|
|
|
|
|
auxiliary_km11(), //3013
|
|
|
|
|
transformer_t_over_temperature_fault(),//3014
|
|
|
|
|
control_power_supply_status(),//3015
|
|
|
|
|
auxiliary_km1(), //3016
|
|
|
|
|
auxiliary_km3(), //3017
|
|
|
|
|
transformer_inv_over_temperature_fault(), //3018
|
|
|
|
|
fan_fault(), //3019
|
|
|
|
|
local_remote(), //3020
|
|
|
|
|
input_discrete(),
|
|
|
|
|
//input_discrete_debug_only(),
|
|
|
|
|
//
|
|
|
|
|
generator_abc(),
|
|
|
|
|
//gen_symm_comp_inp_volt(),
|
|
|
|
|
//amplitude_generator_pwm(1.0),
|
|
|
|
|
//generator_pwm(),
|
|
|
|
|
//
|
|
|
|
|
#if TYPECONTROL == VECTORCONTROL
|
|
|
|
|
regulator_voltage_load_direct(),
|
|
|
|
|
regulator_voltage_load_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
integrator_direct(),
|
|
|
|
|
integrator_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
regulator_current_load_direct(),
|
|
|
|
|
regulator_current_load_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
reference_voltage_direct_intensity(),
|
|
|
|
|
//
|
|
|
|
|
referencer_current_bypass_direct(),
|
|
|
|
|
referencer_current_bypass_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
regulator_current_limit(),
|
|
|
|
|
regulator_current_pfc(),
|
|
|
|
|
#endif
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
|
#if TYPECONTROL == SCALARCONTROL
|
|
|
|
|
regulator_voltage_load_a_active(),
|
|
|
|
|
regulator_voltage_load_a_reactive(),
|
|
|
|
|
regulator_voltage_load_b_active(),
|
|
|
|
|
regulator_voltage_load_b_reactive(),
|
|
|
|
|
regulator_voltage_load_c_active(),
|
|
|
|
|
regulator_voltage_load_c_reactive(),
|
|
|
|
|
//
|
|
|
|
|
regulator_current_limit_a(),
|
|
|
|
|
regulator_current_pfc_a(),
|
|
|
|
|
regulator_current_limit_b(),
|
|
|
|
|
regulator_current_pfc_b(),
|
|
|
|
|
regulator_current_limit_c(),
|
|
|
|
|
regulator_current_pfc_c(),
|
|
|
|
|
//
|
|
|
|
|
current_regulator_a_active(),
|
|
|
|
|
current_regulator_a_reactive(),
|
|
|
|
|
current_regulator_b_active(),
|
|
|
|
|
current_regulator_b_reactive(),
|
|
|
|
|
current_regulator_c_active(),
|
|
|
|
|
current_regulator_c_reactive(),
|
|
|
|
|
current_referencer_a_active(),
|
|
|
|
|
current_referencer_a_reactive(),
|
|
|
|
|
current_referencer_b_active(),
|
|
|
|
|
current_referencer_b_reactive(),
|
|
|
|
|
current_referencer_c_active(),
|
|
|
|
|
current_referencer_c_reactive(),
|
|
|
|
|
//
|
|
|
|
|
regulator_dc_a(),
|
|
|
|
|
regulator_dc_b(),
|
|
|
|
|
regulator_dc_c(),
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if TYPECONTROL == DIRECTREVERSECONTROL
|
|
|
|
|
//
|
|
|
|
|
drc_positive_voltage_controller_direct(),
|
|
|
|
|
drc_positive_voltage_controller_quadrature(),
|
|
|
|
|
drc_negative_voltage_controller_direct(),
|
|
|
|
|
drc_negative_voltage_controller_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
drc_reference_voltage_direct_intensity(),
|
|
|
|
|
//
|
|
|
|
|
drc_regulator_current_load_direct(),
|
|
|
|
|
drc_regulator_current_load_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
drc_referencer_current_bypass_direct(),
|
|
|
|
|
drc_referencer_current_bypass_quadrature(),
|
|
|
|
|
//
|
|
|
|
|
drc_regulator_current_limit(),
|
|
|
|
|
drc_regulator_current_pfc(),
|
|
|
|
|
//
|
|
|
|
|
drc_direct_voltage_decomposer(),
|
|
|
|
|
drc_back_voltage_decomposer(),
|
|
|
|
|
#endif
|
|
|
|
|
//
|
|
|
|
|
timer_start(),
|
|
|
|
|
timer_stop()
|
|
|
|
|
//
|
|
|
|
|
{
|
|
|
|
|
bypass_ready.state.all = 0x15;
|
|
|
|
|
auxiliary_km11.state.all = 0x15;
|
|
|
|
|
hw_dvr_ready.state.all = 0x15;
|
|
|
|
|
}//CONSTRUCTOR
|
|
|
|
|
|
|
|
|
|
} /* namespace SYSCTRL */
|
|
|
|
|
|
