From de707c052ac74e2730c304f33d5ffede4fa7e742 Mon Sep 17 00:00:00 2001 From: Oleg Date: Fri, 21 Feb 2025 20:36:36 +0300 Subject: [PATCH] Add error control. Fix config mistakes with TRS reset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add function for configuring system interrupts Add interrupt that monitors the following errors: EPIM - CAN module has entered “error passive” mode WLIM - One or both error counters (TX and RX) are >= 96 AAIM - A transmission request was aborted Delete some old code --- Protocol/CAN.cpp | 12 +++++-- Protocol/CAN.h | 50 ++++++++++++++--------------- Protocol/CANConfig.cpp | 29 ++++++++++------- main.cpp | 71 ++++++++++++++++++++++++------------------ 4 files changed, 93 insertions(+), 69 deletions(-) diff --git a/Protocol/CAN.cpp b/Protocol/CAN.cpp index 4a6e8b0..7f33496 100644 --- a/Protocol/CAN.cpp +++ b/Protocol/CAN.cpp @@ -24,17 +24,23 @@ void CAN::transmitMsg(Uint16 boxNumber, const CANMessage& message){ p_CanRegs_->CANTRS.all = CanShadow_.CANTRS.all; do { CanShadow_.CANTA.all = p_CanRegs_->CANTA.all; } // TODO add tx error somewhere here - while((CanShadow_.CANTA.all & mboxControl) == 0 );// Wait for TA1 bit to be set + while((CanShadow_.CANTA.all & mboxControl) == 0 );// Wait for TA bit to be set + // Clear TA (transmit acknowledge bit) CanShadow_.CANTA.all = 0; - CanShadow_.CANTA.all |= mboxControl; // Clear TA1 + CanShadow_.CANTA.all |= mboxControl; p_CanRegs_->CANTA.all = CanShadow_.CANTA.all; } -void CAN::updateTXMessage(Uint16 boxNumber, const CANMessage& message){ // TODO check trs bit and set it at the end if it was here + +void CAN::updateTXMessage(Uint16 boxNumber, const CANMessage& message){ // TODO check trs bit and set it at the end if it was here. Once the TRS bit is set for a mailbox and then data is changed in the mailbox using the CDR + // bit, the CAN module fails to transmit the new data and transmits the old data instead. To avoid this, + // reset transmission in that mailbox using the TRRn bit and set the TRSn bit again. The new data is + // then transmitted. volatile MBOX* p_MailBox(NULL); p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; + // Set change data request p_CanRegs_->CANMC.all |= (128 + boxNumber); p_MailBox->MDL.all = message.mdl.all; diff --git a/Protocol/CAN.h b/Protocol/CAN.h index b068315..ee40270 100644 --- a/Protocol/CAN.h +++ b/Protocol/CAN.h @@ -10,6 +10,7 @@ enum CAN_VARIANT{ CANB }; + // eCAN Message Control Register (MSGCTRL) bit definitions struct MsgCtrlBits { // bits description Uint16 DLC:4; // 0:3 @@ -19,6 +20,7 @@ struct MsgCtrlBits { // bits description Uint16 rsvd2:3; // 15:13 reserved }; + union MsgCtrlReg { Uint16 all; struct MsgCtrlBits bit; @@ -28,6 +30,7 @@ union MsgCtrlReg { } }; + struct MsgID_Bits { // bits description Uint16 EXTMSGID_L:16; // 0:15 Uint16 EXTMSGID_H:2; // 16:17 @@ -60,31 +63,6 @@ union MsgID { } }; -/* struct ConfigMsgIDReg{ - Uint32 boxID; - bool isExtendedID; - bool isAAM; - bool isAME; - - ConfigMsgIDReg(Uint32 initBoxID = 0xAAA, bool initIsExtendedID = false, bool initIsAAM = false, bool initIsAME = false) : - boxID(initBoxID), - isExtendedID(initIsExtendedID), - isAAM(initIsAAM), - isAME(initIsAME) - {} -}; */ - - -/* struct ConfigMBox{ - MsgID msgID; - MsgCtrlReg msgCtrlReg; - - ConfigMBox(const MsgID& configMsgID, const Uint16& configMsgCtrlReg) : - // msgID(configMsgID.boxID, configMsgID.isExtendedID, configMsgID.isAAM, configMsgID.isAME), - msgID(configMsgID), - msgCtrlReg(configMsgCtrlReg) - {} -}; */ struct CANMessage { union MsgCtrlReg msgctrl; @@ -97,6 +75,7 @@ struct CANMessage { } }; + class CAN{ public: CAN(CAN_VARIANT canVariant); @@ -105,6 +84,8 @@ public: void config(Uint16 baudrate); void configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg); void configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg); + void configSystemIsr(Uint32 flags); + void configMBoxIsr(Uint16 boxNumber); // TODO not realized yet bool isNewMessage(); bool isNewMessage(Uint16 boxNumber); @@ -123,3 +104,22 @@ private: } // canSpace + + +#define I0EN_ENABLE 1ul +#define I1EN_ENABLE 1ul << 1 +#define GIL_ENABLE 1ul << 2 +#define WLIM_ENABLE 1ul << 8 +#define EPIM_ENABLE 1ul << 9 +#define BOIM_ENABLE 1ul << 10 +#define RMLIM_ENABLE 1ul << 11 +#define WUIM_ENABLE 1ul << 12 +#define WDIM_ENABLE 1ul << 13 +#define AAIM_ENABLE 1ul << 14 +#define TCOM_ENABLE 1ul << 16 +#define MTOM_ENABLE 1ul << 17 + +#define SYSTEM_INTERRUPTS (\ + I0EN_ENABLE |\ + AAIM_ENABLE \ +) diff --git a/Protocol/CANConfig.cpp b/Protocol/CANConfig.cpp index 12224cb..eafbbb9 100644 --- a/Protocol/CANConfig.cpp +++ b/Protocol/CANConfig.cpp @@ -1,4 +1,5 @@ #include "CAN.h" +#include "DSP2833x_Device.h" #include "DSP2833x_ECan.h" #include @@ -13,7 +14,7 @@ void CAN::initGpio(){ else if (canPort == CANB) InitECanbGpio(); } -void CAN::config(Uint16 baudrate){ +void CAN::config(Uint16 baudrate){ // TODO add isr disable here if (canPort == CANA){ EALLOW; SysCtrlRegs.PCLKCR0.bit.ECANAENCLK = 1; @@ -163,11 +164,6 @@ void CAN::config(Uint16 baudrate){ // Disable all Mailboxes p_CanRegs_->CANME.all = 0; // Required before writing the MSGIDs - // Reset all transmittions - p_CanRegs_->CANTRR.all = 0xFFFFFFFF; // 0x1111_1111 - do {CanShadow_.CANTRS.all = p_CanRegs_->CANTRS.all;} - while(CanShadow_.CANTRS.all != 0); // Wait for TRS bit to be cleared - // // Debug feature // Configure the eCAN for self test mode. @@ -189,11 +185,15 @@ void CAN::configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg mboxControl = 1ul << boxNumber; // Reset transmittion - CanShadow_.CANTRR.all = p_CanRegs_->CANTRR.all; - CanShadow_.CANTRR.all |= mboxControl; - p_CanRegs_->CANTRR.all = CanShadow_.CANTRR.all; - do {CanShadow_.CANTRS.all = p_CanRegs_->CANTRS.all;} - while((CanShadow_.CANTRS.all & mboxControl) != 0); // Wait for TRS bit to be cleared + if (CanShadow_.CANTRS.all &= mboxControl) + { + CanShadow_.CANTRR.all = p_CanRegs_->CANTRR.all; + CanShadow_.CANTRR.all |= mboxControl; + p_CanRegs_->CANTRR.all = CanShadow_.CANTRR.all; + do {CanShadow_.CANTRS.all = p_CanRegs_->CANTRS.all;} + while((CanShadow_.CANTRS.all & mboxControl) != 0); // Wait for TRS bit to be cleared + } + // Mailbox disable CanShadow_.CANME.all = p_CanRegs_->CANME.all; @@ -261,4 +261,11 @@ void CAN::configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg // p_MailBox->MDH.all = 0x55555555; } + +void CAN::configSystemIsr(Uint32 flags){ + EALLOW; + p_CanRegs_->CANGIM.all = flags; + EDIS; +} + } //canSpace diff --git a/main.cpp b/main.cpp index 5eaa9da..88552db 100644 --- a/main.cpp +++ b/main.cpp @@ -12,11 +12,12 @@ //Functions declarations void idle_loop(void); interrupt void cpu_timer0_isr(void); -//interrupt void adc_isr(void); +interrupt void canb_isr(void); +volatile Uint16 canISRcounter = 0; canSpace::CAN canTest(canSpace::CANB); Uint16 msgsSent = 0; -Uint16 infCounter = 0; +volatile Uint16 infCounter = 0; volatile Uint16 testCounter = 0; Uint32 testVar = 0; volatile bool startTX = false; @@ -43,30 +44,29 @@ void main() EALLOW; PieVectTable.TINT0 = &cpu_timer0_isr; + PieVectTable.ECAN0INTB = &canb_isr; EDIS; // memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize); - // Call Flash Initialization to setup flash waitstates - // This function must reside in RAM -// InitFlash(); - - -// flash.setup(SECTORD, (Uint16*)0x320000, (Uint16*)0x327FFF); - -// configuration_parameters.setup(TIME_SAMPLE_CONTROL, TIME_SAMPLE_CONTROL_SLOW, TIME_SAMPLE_SERVICE, TPWM, FCPU, FPWM); -// configuration_parameters.load_flash(); - //configuration_parameters.extract_configuration(system_config); -// configuration_parameters.extract_configuration(test_config); - InitCpuTimers(); - ConfigCpuTimer(&CpuTimer0, 150, 10000); + ConfigCpuTimer(&CpuTimer0, 150, 100000); IER |= M_INT1; // Enable CPU Interrupt 1 - // Enable ADCINT in PIE -// PieCtrlRegs.PIEIER1.bit.INTx6 = 1; + IER |= M_INT9; // Enable CPU Interrupt 9 + PieCtrlRegs.PIEIER1.bit.INTx7 = 1; + PieCtrlRegs.PIEIER9.bit.INTx7 = 1; // from 5 to 8 + canTest.initGpio(); + canTest.config(100); + canTest.configTxMBox(1, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8)); + canTest.configRxMBox(25, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8)); + // Remote frame + canTest.configRxMBox(2, canSpace::MsgID(0x111), canSpace::MsgCtrlReg(0x13)); + // canTest.configTxMBox(30, canSpace::MsgID(0x111, false, true), canSpace::MsgCtrlReg(0x3)); // for remote answer + + canTest.configSystemIsr(I0EN_ENABLE | EPIM_ENABLE | WLIM_ENABLE | AAIM_ENABLE); // // Enable global Interrupts and higher priority real-time debug events: @@ -81,17 +81,6 @@ void main() // core.cpu_timers.start(); // - canTest.initGpio(); - canTest.config(100); - canTest.configTxMBox(1, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8)); - canTest.configRxMBox(25, canSpace::MsgID(0xAAA), canSpace::MsgCtrlReg(0x8)); - // Remote frame - canTest.configRxMBox(2, canSpace::MsgID(0x111), canSpace::MsgCtrlReg(0x13)); - // canTest.configTxMBox(30, canSpace::MsgID(0x111, false, true), canSpace::MsgCtrlReg(0x3)); // for remote answer - - // InitECanGpio(); - // InitECan(); - CpuTimer0.RegsAddr->TCR.bit.TSS = 0; message.msgctrl.bit.DLC = 8; @@ -127,7 +116,7 @@ void idle_loop() // testVar = canTest.receiveMsg(2, rxMessage); } - // testVar = canTest.receiveMsg(2, rxMessage); + testVar = canTest.receiveMsg(2, rxMessage); if (update){ update = false; @@ -143,7 +132,7 @@ void idle_loop() }//end while // }//end idle_loop() -// + interrupt void cpu_timer0_isr(void) { @@ -157,3 +146,25 @@ interrupt void cpu_timer0_isr(void) PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1; }//end + + +interrupt void canb_isr(void){ + canISRcounter++; + + CANGIF0_REG CANGIF0_SHADOW; + volatile Uint32 resetBit; + + CANGIF0_SHADOW.all = ECanbRegs.CANGIF0.all; + + if (CANGIF0_SHADOW.bit.WLIF0){ + resetBit = 256; + ECanbRegs.CANGIF0.all = resetBit; + } + + if (CANGIF0_SHADOW.bit.EPIF0){ + resetBit = 528; + ECanbRegs.CANGIF0.all = resetBit; + } + + PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9; +}