From 0efa3cb375386635789b0f31207fad53603859ba Mon Sep 17 00:00:00 2001 From: Oleg Date: Mon, 24 Feb 2025 15:14:57 +0300 Subject: [PATCH] Add changes in init functions Replace #define to enum for safety reasons Now config function takes as an arguments not only baudrate, but flags for most significant bit and self teset mode initialization. All parameters have a default value now Add protection against access to MBOX with number > 31 in every possible functions Remove some old code --- Protocol/CAN.cpp | 40 +++++++------------------------ Protocol/CAN.h | 43 +++++++++++++++++---------------- Protocol/CANConfig.cpp | 54 ++++++++++++++++++++++++------------------ main.cpp | 2 +- 4 files changed, 64 insertions(+), 75 deletions(-) diff --git a/Protocol/CAN.cpp b/Protocol/CAN.cpp index 7f33496..ff91ef4 100644 --- a/Protocol/CAN.cpp +++ b/Protocol/CAN.cpp @@ -1,4 +1,3 @@ -#include "CAN.h" #include "DSP2833x_Device.h" #include @@ -37,10 +36,12 @@ void CAN::updateTXMessage(Uint16 boxNumber, const CANMessage& message){ // TODO // bit, the CAN module fails to transmit the new data and transmits the old data instead. To avoid this, // reset transmission in that mailbox using the TRRn bit and set the TRSn bit again. The new data is // then transmitted. + if (boxNumber > 31) return; + volatile MBOX* p_MailBox(NULL); p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; - // Set change data request + // Set change data request (CDR bit + MBOX number) p_CanRegs_->CANMC.all |= (128 + boxNumber); p_MailBox->MDL.all = message.mdl.all; @@ -53,6 +54,8 @@ void CAN::updateTXMessage(Uint16 boxNumber, const CANMessage& message){ // TODO void CAN::sendRemoteRequest(Uint16 boxNumber){ + if (boxNumber > 31) return; + volatile MBOX* p_MailBox(NULL); p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; @@ -79,6 +82,8 @@ void CAN::sendRemoteRequest(Uint16 boxNumber){ bool CAN::receiveMsg(Uint16 boxNumber, CANMessage& rxMessage){ // TODO faults just return -1 + if (boxNumber > 31) { return -1; } + Uint32 mboxControl(0); mboxControl = 1ul << boxNumber; @@ -115,6 +120,8 @@ bool CAN::isNewMessage(){ bool CAN::isNewMessage(Uint16 boxNumber){ + if (boxNumber > 31) { return 0; } + Uint32 mboxControl(0); mboxControl = 1ul << boxNumber; @@ -123,33 +130,4 @@ bool CAN::isNewMessage(Uint16 boxNumber){ } -/* CANMessage CAN::receiveMsg(Uint16 boxNumber){ - Uint32 mboxControl(0); - mboxControl = 1ul << boxNumber; - - volatile MBOX* p_MailBox(NULL); - p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; - CANMessage rxMessage; - - p_CanRegs_->CANRMP.all &= mboxControl; - - rxMessage.MSGCTRL.all = p_MailBox->MSGCTRL.all; - rxMessage.MDL.all = p_MailBox->MDL.all; - rxMessage.MDH.all = p_MailBox->MDH.all; - - bool newMessage; - bool lostMessage; - - newMessage = p_CanRegs_->CANRMP.all & mboxControl; - lostMessage = p_CanRegs_->CANRML.all & mboxControl; - - if(newMessage || lostMessage) { - counter_fault_rx++; // TODO delete after debug - // set_fault(); - } - - return rxMessage; -} */ - - } // canSpace diff --git a/Protocol/CAN.h b/Protocol/CAN.h index ee40270..d07e7be 100644 --- a/Protocol/CAN.h +++ b/Protocol/CAN.h @@ -10,6 +10,28 @@ enum CAN_VARIANT{ CANB }; +enum configFlags{ + NONE = 0, + MSB_ENABLE = 1u << 0, + STM_ENABLE = 1u << 1 +}; + + +enum configSystemIsrFlags{ + I0EN_ENABLE = 1ul, + I1EN_ENABLE = 1ul << 1, + GIL_ENABLE = 1ul << 2, + WLIM_ENABLE = 1ul << 8, + EPIM_ENABLE = 1ul << 9, + BOIM_ENABLE = 1ul << 10, + RMLIM_ENABLE = 1ul << 11, + WUIM_ENABLE = 1ul << 12, + WDIM_ENABLE = 1ul << 13, + AAIM_ENABLE = 1ul << 14, + TCOM_ENABLE = 1ul << 16, + MTOM_ENABLE = 1ul << 17 +}; + // eCAN Message Control Register (MSGCTRL) bit definitions struct MsgCtrlBits { // bits description @@ -81,7 +103,7 @@ public: CAN(CAN_VARIANT canVariant); void initGpio(); - void config(Uint16 baudrate); + void config(Uint16 baudrate = 1000, Uint16 flags = 0); void configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg); void configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg); void configSystemIsr(Uint32 flags); @@ -104,22 +126,3 @@ private: } // canSpace - - -#define I0EN_ENABLE 1ul -#define I1EN_ENABLE 1ul << 1 -#define GIL_ENABLE 1ul << 2 -#define WLIM_ENABLE 1ul << 8 -#define EPIM_ENABLE 1ul << 9 -#define BOIM_ENABLE 1ul << 10 -#define RMLIM_ENABLE 1ul << 11 -#define WUIM_ENABLE 1ul << 12 -#define WDIM_ENABLE 1ul << 13 -#define AAIM_ENABLE 1ul << 14 -#define TCOM_ENABLE 1ul << 16 -#define MTOM_ENABLE 1ul << 17 - -#define SYSTEM_INTERRUPTS (\ - I0EN_ENABLE |\ - AAIM_ENABLE \ -) diff --git a/Protocol/CANConfig.cpp b/Protocol/CANConfig.cpp index eafbbb9..2e500a9 100644 --- a/Protocol/CANConfig.cpp +++ b/Protocol/CANConfig.cpp @@ -1,4 +1,3 @@ -#include "CAN.h" #include "DSP2833x_Device.h" #include "DSP2833x_ECan.h" #include @@ -9,12 +8,13 @@ CAN::CAN(CAN_VARIANT canVariant) : canPort(canVariant) {} + void CAN::initGpio(){ if(canPort == CANA) InitECanaGpio(); else if (canPort == CANB) InitECanbGpio(); } -void CAN::config(Uint16 baudrate){ // TODO add isr disable here +void CAN::config(Uint16 baudrate, Uint16 flags){ if (canPort == CANA){ EALLOW; SysCtrlRegs.PCLKCR0.bit.ECANAENCLK = 1; @@ -31,16 +31,13 @@ void CAN::config(Uint16 baudrate){ // TODO add isr disable here } else { return; } - // - // Create a shadow register structure for the CAN control registers. This + // Create a shadow register structure for the CAN control registers. This // TODO add this into description // is needed, since only 32-bit access is allowed to these registers. // 16-bit access to these registers could potentially corrupt the register // contents or return false data. This is especially true while writing // to/reading from a bit (or group of bits) among bits 16 - 31 - // - // struct ECAN_REGS ECanShadow; - EALLOW; // EALLOW enables access to protected bits + EALLOW; // Configure eCAN RX and TX pins for CAN operation using eCAN regs CanShadow_.CANTIOC.all = p_CanRegs_->CANTIOC.all; @@ -98,31 +95,33 @@ void CAN::config(Uint16 baudrate){ // TODO add isr disable here // TAn, RMPn, GIFn bits are all zero upon reset and are cleared again // as a matter of precaution. - p_CanRegs_->CANTA.all = 0xFFFFFFFF; // Clear all TAn bits - - p_CanRegs_->CANRMP.all = 0xFFFFFFFF; // Clear all RMPn bits - - p_CanRegs_->CANGIF0.all = 0xFFFFFFFF; // Clear all interrupt flag bits + p_CanRegs_->CANTA.all = 0xFFFFFFFF; + p_CanRegs_->CANRMP.all = 0xFFFFFFFF; + p_CanRegs_->CANGIF0.all = 0xFFFFFFFF; p_CanRegs_->CANGIF1.all = 0xFFFFFFFF; // Configure bit timing parameters for eCANA CanShadow_.CANMC.all = p_CanRegs_->CANMC.all; - CanShadow_.CANMC.bit.CCR = 1 ; // Set CCR = 1 + CanShadow_.CANMC.bit.CCR = 1 ; p_CanRegs_->CANMC.all = CanShadow_.CANMC.all; do { CanShadow_.CANES.all = p_CanRegs_->CANES.all; } - while(CanShadow_.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set + while(CanShadow_.CANES.bit.CCE != 1 ); - // CanShadow_.CANMC.all = p_CanRegs_->CANMC.all; //TODO delete - // CanShadow_.CANMC.bit.DBO = 1 ; // Set DBO = 1 - // p_CanRegs_->CANMC.all = CanShadow_.CANMC.all; + // LSB - 0; MSB - 1 + CanShadow_.CANMC.all = p_CanRegs_->CANMC.all; + if (flags & MSB_ENABLE){ + CanShadow_.CANMC.bit.DBO = 1; + } + else + { CanShadow_.CANMC.bit.DBO = 0; } + p_CanRegs_->CANMC.all = CanShadow_.CANMC.all; CanShadow_.CANBTC.all = 0; // The following block for all 150 MHz SYSCLKOUT // (75 MHz CAN clock) - default. Bit rate = 1 Mbps / 500 kbps / 250 kbps / 100 kbps - switch (baudrate) { case 1000: CanShadow_.CANBTC.bit.BRPREG = 4; @@ -162,21 +161,29 @@ void CAN::config(Uint16 baudrate){ // TODO add isr disable here while(CanShadow_.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared // Disable all Mailboxes - p_CanRegs_->CANME.all = 0; // Required before writing the MSGIDs + p_CanRegs_->CANME.all = 0; + + // Disable all interrupts + p_CanRegs_->CANGIM.all = 0; + p_CanRegs_->CANMIM.all = 0; // // Debug feature // Configure the eCAN for self test mode. - // - // CanShadow_.CANMC.all = p_CanRegs_->CANMC.all; - // CanShadow_.CANMC.bit.STM = 1; // Configure CAN for self-test mode - // p_CanRegs_->CANMC.all = CanShadow_.CANMC.all; + CanShadow_.CANMC.all = p_CanRegs_->CANMC.all; + if (flags & STM_ENABLE){ + CanShadow_.CANMC.bit.STM = 1; + } + else + { CanShadow_.CANMC.bit.STM = 0; } + p_CanRegs_->CANMC.all = CanShadow_.CANMC.all; EDIS; } void CAN::configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg){ + if (boxNumber > 31) return; volatile MBOX* p_MailBox(NULL); p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; @@ -220,6 +227,7 @@ void CAN::configTxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg void CAN::configRxMBox(Uint16 boxNumber, const MsgID& configID, const MsgCtrlReg& configCtrlReg){ + if (boxNumber > 31) return; volatile MBOX* p_MailBox(NULL); p_MailBox = &(p_CanMBoxes_->MBOX0) + boxNumber; diff --git a/main.cpp b/main.cpp index 88552db..89f81c2 100644 --- a/main.cpp +++ b/main.cpp @@ -66,7 +66,7 @@ void main() canTest.configRxMBox(2, canSpace::MsgID(0x111), canSpace::MsgCtrlReg(0x13)); // canTest.configTxMBox(30, canSpace::MsgID(0x111, false, true), canSpace::MsgCtrlReg(0x3)); // for remote answer - canTest.configSystemIsr(I0EN_ENABLE | EPIM_ENABLE | WLIM_ENABLE | AAIM_ENABLE); + canTest.configSystemIsr(canSpace::I0EN_ENABLE | canSpace::EPIM_ENABLE | canSpace::WLIM_ENABLE | canSpace::AAIM_ENABLE); // // Enable global Interrupts and higher priority real-time debug events: