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164 lines
5.1 KiB
C++
164 lines
5.1 KiB
C++
4 weeks ago
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/*
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* SCIB.cpp
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*
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* Author: Aleksey Gerasimenko
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* gerasimenko.aleksey.n@gmail.com
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*/
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#include "DSP28335/SCIB.h"
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namespace DSP28335
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{
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//CONSTRUCTOR
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SCIB::SCIB(volatile struct SCI_REGS& SciRegs):
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DSP28335::SCIBase(SciRegs)
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{
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// set default
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settings.config.baudrate = SCIB_BAUDRATE_DEFAULT;
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settings.config.parity = SCIB_PARITY_DEFAULT;
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settings.config.stopbits = SCIB_STOPBITS_DEFAULT;
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settings.config.lenght = SCIB_LENGHT_DEFAULT;
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settings.gpio_setup = SCIB_GPIO_SETUP_DEFAULT;
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//
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}//CONSTRUCTOR
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//
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void SCIB::setup()
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{
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//
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get_default_configuration(settings.config);
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_configure(settings.config);
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//
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_gpio_setup = settings.gpio_setup;
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(*_gpio_setup)();
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//
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}//
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//
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void SCIB::setup(DSP28335::SCISetup& setup)
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{
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settings = setup;
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_configure(settings.config);
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_gpio_setup = settings.gpio_setup;
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(*_gpio_setup)();
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}//
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//
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void SCIB::get_default_configuration(DSP28335::SCIConfiguration& config)
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{
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config.baudrate = SCIB_BAUDRATE_DEFAULT;
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config.parity = SCIB_PARITY_DEFAULT;
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config.stopbits = SCIB_STOPBITS_DEFAULT;
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config.lenght = SCIB_LENGHT_DEFAULT;
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//
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}//
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//
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void SCIB::get_configuration(DSP28335::SCIConfiguration& config)
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{
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config = settings.config;
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//
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}//
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//
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void SCIB::set_configuration(DSP28335::SCIConfiguration& config)
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{
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settings.config = config;
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_configure(settings.config);
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//
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}//
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//
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bool SCIB::compare_configuration(DSP28335::SCIConfiguration& config)
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{
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return (settings.config.baudrate == config.baudrate)
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& (settings.config.parity == config.parity)
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& (settings.config.stopbits == config.stopbits)
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& (settings.config.lenght == config.lenght);
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//
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}//
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//
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void SCIB::_configure(DSP28335::SCIConfiguration& config)
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{
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//
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// SCICTL1.5 - Software reset 0/1-reset/active state
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//m_sci_regs.SCICTL1.bit.SWRESET = 0x000;
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SciRegs.SCICTL1.bit.SWRESET = 0x000;
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//
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// Reset FIFO's
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SciRegs.SCIFFTX.all=0x8000;
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//
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// SCICCR.7 - Number of stop bits
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switch(config.stopbits)
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{
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case DSP28335::ONE: { SciRegs.SCICCR.bit.STOPBITS = 0x00; break;}
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case DSP28335::TWO: { SciRegs.SCICCR.bit.STOPBITS = 0x01; break;}
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default: {break;}
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}//switch
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//
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// SCICCR.5 - Parity enable
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// SCICCR.6 - Parity odd/even
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switch(config.parity)
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{
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case DSP28335::NO: {SciRegs.SCICCR.bit.PARITYENA = 0x00; SciRegs.SCICCR.bit.PARITY = 0x00; break;}
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case DSP28335::ODD: {SciRegs.SCICCR.bit.PARITYENA = 0x01; SciRegs.SCICCR.bit.PARITY = 0x00; break;}
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case DSP28335::EVEN: {SciRegs.SCICCR.bit.PARITYENA = 0x01; SciRegs.SCICCR.bit.PARITY = 0x01; break;}
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default: {break;}
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}//switch
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//
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// SCICCR.4 - Loop Back test mode enable
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SciRegs.SCICCR.bit.LOOPBKENA = 0x00;
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//
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// SCICCR.3 - Idle - Address mode protocol
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SciRegs.SCICCR.bit.ADDRIDLE_MODE = 0x00;
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//
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// SCICCR.2-0 - Character-length
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switch(config.lenght)
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{
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case DSP28335::LEN1: {SciRegs.SCICCR.bit.SCICHAR = 0x00; break;}
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case DSP28335::LEN2: {SciRegs.SCICCR.bit.SCICHAR = 0x01; break;}
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case DSP28335::LEN3: {SciRegs.SCICCR.bit.SCICHAR = 0x02; break;}
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case DSP28335::LEN4: {SciRegs.SCICCR.bit.SCICHAR = 0x03; break;}
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case DSP28335::LEN5: {SciRegs.SCICCR.bit.SCICHAR = 0x04; break;}
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case DSP28335::LEN6: {SciRegs.SCICCR.bit.SCICHAR = 0x05; break;}
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case DSP28335::LEN7: {SciRegs.SCICCR.bit.SCICHAR = 0x06; break;}
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case DSP28335::LEN8: {SciRegs.SCICCR.bit.SCICHAR = 0x07; break;}
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default: {break;}
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}//switch
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//
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// SCICTL1.6 - Receive error interrupt enable
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SciRegs.SCICTL1.bit.RXERRINTENA =0x000;
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//
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SciRegs.SCICTL1.bit.RXENA =0x001; // Receiver enable
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SciRegs.SCICTL1.bit.TXENA =0x001; // Transmitter enable
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SciRegs.SCICTL1.bit.SLEEP =0x000; // Sleep 0/1 - disable/enable
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SciRegs.SCICTL1.bit.TXWAKE =0x000; // Transmitter wake-up method select
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SciRegs.SCICTL2.bit.TXINTENA =0x000; // SCITXBUF-register interrupt enable
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SciRegs.SCICTL2.bit.RXBKINTENA =0x00; // Receiver-buffer/break interrupt enable
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// Ideal Baud BRR Actual Baud Error, %
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// 2400 1952(07A0h) 2400 0
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// 4800 976(03D0h) 4798 -0,04
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// 9600 487(01E7h) 9606 0.06
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// 19200 243(00F3h) 19211 0.06
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// 38400 121(0079h) 38422 0.006
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switch(config.baudrate)
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{
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case DSP28335::BR2400: {SciRegs.SCIHBAUD = 0x0007; SciRegs.SCILBAUD = 0x00A0; break;}
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case DSP28335::BR4800: {SciRegs.SCIHBAUD = 0x0003; SciRegs.SCILBAUD = 0x00D0; break;}
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case DSP28335::BR9600: {SciRegs.SCIHBAUD = 0x0001; SciRegs.SCILBAUD = 0x00E7; break;}
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case DSP28335::BR19200: {SciRegs.SCIHBAUD = 0x0000; SciRegs.SCILBAUD = 0x00F3; break;}
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case DSP28335::BR38400: {SciRegs.SCIHBAUD = 0x0000; SciRegs.SCILBAUD = 0x0079; break;}
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default: {break;}
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}//switch
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// SCICTL1.5 - Relinquish SCI from Reset
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SciRegs.SCICTL1.bit.SWRESET =0x001;
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//
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}//
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//
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} /* namespace DSP28335 */
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