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// Some comments about author
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "DSP2833x_Device.h"
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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#include "DSP2833x_Examples.h"
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// #include "Protocol/CAN.h"
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// #include "Protocol/CAN_data.h"
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// #include "Protocol/DigitalIO.h"
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#include "Periphery.h"
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#include "SinglePhaseDefaults.h"
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#include "RUDRIVEFRAMEWORK/HeaderRUDRIVEFRAMEWORK.h"
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#include "WEINBUS/HeaderWeinbus.h"
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#include "PERIPHERY/PWMSInterace.h"
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//Functions declarations
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void idle_loop(void);
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interrupt void cpu_timer0_isr(void);
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interrupt void cpu_timer1_isr(void);
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interrupt void canb_isr(void);
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interrupt void canb_box_isr(void);
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// Periphery periphery;
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//----------------------------------------------------------------------------------------
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DSP28335::SCISetup SCIbSetup;
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DSP28335::SCIB scib(ScibRegs);
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DSP28335::MeasureTimeInterval interval_measure(CpuTimer2);
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// MODBUS RTU - PORT & HMI
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MODBUSRTU::ModbusRTUTransceiverSetup modbus;
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MODBUSRTU::ModbusRTUCRC crc;
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MODBUSRTU::ModbusRTUTransceiver modbus_port(scib, interval_measure, crc);
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WEINBUS::WeinbusSlave hmi(crc);
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MODBUSRTU::ModbusRTUTransceiverConfiguration modbus_port_configuration;
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// Registers to testing HMI interface
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WEINBUS::REGISTER_32 test_hmi_float_reg_400 = WEINBUS::REGISTER_32(0);
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WEINBUS::REGISTER_32 test_hmi_float_reg_401 = WEINBUS::REGISTER_32(0);
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WEINBUS::REGISTER_32 test_hmi_float_reg_402 = WEINBUS::REGISTER_32(0);
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WEINBUS::REGISTER_32 test_hmi_float_reg_403 = WEINBUS::REGISTER_32(0);
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WEINBUS::REGISTER_32 test_hmi_float_reg_404 = WEINBUS::REGISTER_32(0);
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//<>
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void modify_hardware_setup(RUDRIVEFRAMEWORK::SinglePhaseSetup& setup);
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void hardcode_pwm_configuration(PERIPHERY::PWMSInterfaceConfiguration& config);
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void test_init_hmi_buffers();
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void clear_array(uint16_t *pointer, uint16_t sizearray);
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//----------------------------------------------------------------------------------------
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volatile Uint16 infCounter = 0;
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volatile Uint16 canISRcounter = 0;
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volatile Uint16 canBoxISRcounter = 0;
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volatile Uint16 testCounter = 0;
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volatile bool init = true;
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volatile bool startTX = false;
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volatile bool update = false;
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volatile bool sendRemote = false;
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Uint16 modbusInit = 0;
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int32 testVar = 0;
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void main()
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{
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ServiceDog();
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DisableDog();
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InitSysCtrl();
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DINT;
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InitPieCtrl();
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IER = 0x0000;
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IFR = 0x0000;
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InitPieVectTable();
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EALLOW;
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PieVectTable.TINT0 = &cpu_timer0_isr;
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PieVectTable.XINT13 = &cpu_timer1_isr;
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PieVectTable.ECAN0INTB = &canb_isr;
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PieVectTable.ECAN1INTB = &canb_box_isr;
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EDIS;
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InitCpuTimers();
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ConfigCpuTimer(&CpuTimer0, 150, 1000); // 1ms
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ConfigCpuTimer(&CpuTimer1, 150, 5000); // 5ms
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IER |= M_INT1; // Enable CPU Interrupt 1
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IER |= M_INT9; // Enable CPU Interrupt 9
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IER |= M_INT13; // Enable CPU Interrupt 13
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PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
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PieCtrlRegs.PIEIER9.bit.INTx7 = 1; // from 5 to 8
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PieCtrlRegs.PIEIER9.bit.INTx8 = 1;
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// periphery.config();
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//----------------------------------------------------------------------------------------
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SCIbSetup.config.baudrate = SCIB_BAUDRATE_DEFAULT;
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SCIbSetup.config.parity = SCIB_PARITY_DEFAULT;
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SCIbSetup.config.stopbits = SCIB_STOPBITS_DEFAULT;
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SCIbSetup.config.lenght = SCIB_LENGHT_DEFAULT;
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SCIbSetup.gpio_setup = SCIB_GPIO_SETUP_DEFAULT;
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modbus.gpio_re_de_setup = &DSP28335::GPIO::gpio_scib_re_de_setup;
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modbus.gpio_driver_enable = &DSP28335::GPIO::gpio_scib_re_de_set;
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modbus.gpio_receiver_enable = &DSP28335::GPIO::gpio_scib_re_de_clear;
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scib.setup(SCIbSetup);
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interval_measure.set_magic((Uint32)0);
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interval_measure.reset();
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modbus_port.setup(modbus);
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//----------------------------------------------------------------------------------------
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// Enable global Interrupts and higher priority real-time debug events:
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EINT; // Enable Global interrupt INTM
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ERTM; // Enable Global realtime interrupt DBGM
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// periphery.updateVersionFPGA();
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//----------------------------------------------------------------------------------------
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// MODBUS RTU
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//
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modbus_port_configuration.node_id = 0x5;
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modbus_port_configuration.config.baudrate = DSP28335::BR9600;
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modbus_port_configuration.config.parity = DSP28335::NO;
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modbus_port_configuration.config.stopbits = DSP28335::ONE;
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modbus_port_configuration.config.lenght = DSP28335::LEN8;
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//
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test_init_hmi_buffers();
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modbus_port.configure(modbus_port_configuration);
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clear_array((uint16_t *)hmi.rxStack, sizeof(hmi.rxStack)/sizeof(uint16_t));
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clear_array((uint16_t *)hmi.txStack, sizeof(hmi.txStack)/sizeof(uint16_t));
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modbus_port.setRXBuffer((uint16_t*)hmi.rxStack, &hmi.rxLength);
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modbus_port.setTXBuffer((uint16_t*)hmi.txStack, &hmi.txLength);
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// interval_measure.set_magic(19);
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//----------------------------------------------------------------------------------------
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CpuTimer0.RegsAddr->TCR.bit.TSS = 0;
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CpuTimer1.RegsAddr->TCR.bit.TSS = 0;
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idle_loop();
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//
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}//end main()
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//
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//
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void idle_loop()
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{
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while (true)
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{
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infCounter++;
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// periphery.initExternalModbus();
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//
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// MODBUS RTU HMI Service
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//
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if(modbus_port.compare_state(MODBUSRTU::BREAK))
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{
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modbus_port.port_reset();
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//
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}
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else
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{
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modbus_port.execute();
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hmi.execute();
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//
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}//if else
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//<>
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}//end while
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}//end idle_loop()
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interrupt void cpu_timer0_isr(void)
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{
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// periphery.processDigitalOutput();
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PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1;
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}//end
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interrupt void cpu_timer1_isr(){
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CpuTimer1.InterruptCount++;
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// periphery.processDigitalInput();
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}
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interrupt void canb_isr(void){
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canISRcounter++;
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CANGIF0_REG CANGIF0_SHADOW;
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volatile Uint32 resetBit;
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CANGIF0_SHADOW.all = ECanbRegs.CANGIF0.all;
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if (CANGIF0_SHADOW.bit.WLIF0){
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resetBit = 256;
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ECanbRegs.CANGIF0.all = 256ul;
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}
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if (CANGIF0_SHADOW.bit.EPIF0){
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ECanbRegs.CANGIF0.all = 528ul;
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}
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PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;
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}
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interrupt void canb_box_isr(void){
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canBoxISRcounter++;
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// Just example
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//
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// volatile Uint32 boxNumberIsr;
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// boxNumberIsr = ECanbRegs.CANGIF1.bit.MIV1;
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// CANRMP_REG temp;
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// temp.all = 0;
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// temp.all = 1ul << 27;
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// ECanbRegs.CANRMP.all = temp.all;
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// MODBUS_COMM_CPU_Message27.mdh.all = ECanbMboxes.MBOX27.MDH.all;
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// MODBUS_COMM_CPU_Message27.mdl.all = ECanbMboxes.MBOX27.MDL.all;
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// temp.all = ECanbRegs.CANRMP.all;
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// if (temp.bit.RMP25){
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// temp.all = 1ul << 25;
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// ECanbRegs.CANRMP.all = temp.all;
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// MODBUS_COMM_CPU_Message25.mdh.all = ECanbMboxes.MBOX25.MDH.all;
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// MODBUS_COMM_CPU_Message25.mdl.all = ECanbMboxes.MBOX25.MDL.all;
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// }
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PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;
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}
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void test_init_hmi_buffers()
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{
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//
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// hmi writeable registers
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hmi.inputRegisters.set(WEINBUS::INPUTREGISTERS, 400);
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hmi.inputRegisters.add( 0, &(float&)test_hmi_float_reg_400.f);
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hmi.inputRegisters.add( 1, &(float&)test_hmi_float_reg_401.f);
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hmi.inputRegisters.add( 2, &(float&)test_hmi_float_reg_402.f);
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hmi.inputRegisters.add( 3, &(float&)test_hmi_float_reg_403.f);
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hmi.inputRegisters.add( 4, &(float&)test_hmi_float_reg_404.f);
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//
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// hmi readable registers
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hmi.outputRegisters.set(WEINBUS::OUTPUTREGISTERS, 400);
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hmi.outputRegisters.add( 0 , &(float&)test_hmi_float_reg_400.f);
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hmi.outputRegisters.add( 1, &(float&)test_hmi_float_reg_401.f);
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hmi.outputRegisters.add( 2, &(float&)test_hmi_float_reg_402.f);
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hmi.outputRegisters.add( 3, &(float&)test_hmi_float_reg_403.f);
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hmi.outputRegisters.add( 4, &(float&)test_hmi_float_reg_404.f);
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//
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}//
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//
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void clear_array(uint16_t *pointer, uint16_t sizearray)
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{
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static uint16_t *p_array = 0;
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static uint16_t size_array = 0;
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p_array = pointer;
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size_array = sizearray;
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while(size_array--)
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{
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*p_array++ = 0;
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}
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//
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}//
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void modify_hardware_setup(RUDRIVEFRAMEWORK::SinglePhaseSetup& setup)
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{
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//
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// SCIB - interface with monitor? RS485, MODBUS RTU
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//
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//setup.cpu.scib.config.baudrate = SCIB_BAUDRATE_DEFAULT;
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//setup.cpu.scib.config.parity = SCIB_PARITY_DEFAULT;
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//setup.cpu.scib.config.stopbits = SCIB_STOPBITS_DEFAULT;
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//setup.cpu.scib.config.lenght = SCIB_LENGHT_DEFAULT;
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//setup.cpu.scib.gpio_setup = SCIB_GPIO_SETUP_DEFAULT;
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//
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// SCIC - internal interface
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//
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//setup.cpu.scic.config.baudrate = SCIC_BAUDRATE_DEFAULT;
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//setup.cpu.scic.config.parity = SCIC_PARITY_DEFAULT;
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//setup.cpu.scic.config.stopbits = SCIC_STOPBITS_DEFAULT;
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//setup.cpu.scic.config.lenght = SCIC_LENGHT_DEFAULT;
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//setup.cpu.scic.gpio_setup = SCIC_GPIO_SETUP_DEFAULT;
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//
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// CPU Timers
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//
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//setup.cpu.cpu_timers.frequency = 150.0; //150MHz
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//setup.cpu.cpu_timers.period = 1000.0; //1000us
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//
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// EPWM
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//
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// setup.cpu.epwm.parameters.fpwm = 750.0; //Hz
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//setup.cpu.epwm.parameters.pulse_sync = 1.0e-6; //s
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//setup.cpu.epwm.parameters.pulse_adc_soc = 32.0e-6; //s
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//setup.cpu.epwm.parameters.adc_soc_offset = FP_ZERO; //relative
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// setup.cpu.epwm.parameters.adc_soc_quantity = 3;
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//setup.cpu.epwm.gpio_setup = &DSP28335::GPIO::gpio_epwm_setup;
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//
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// XINTF
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//
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//setup.cpu.xintf.gpio_setup = &DSP28335::GPIO::gpio_xintf_16bit_setup;
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//
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// ECANA
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//
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//setup.cpu.ecana.gpio_setup = &DSP28335::GPIO::gpio_cana_setup;
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//
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// ECANB
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//
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//setup.cpu.ecanb.gpio_setup = &DSP28335::GPIO::gpio_canb_setup;
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//
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// EQEP
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//
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//setup.cpu.eqep1.gpio_setup = &DSP28335::GPIO::gpio_eqep_setup;
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//
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// Discrete Outputs
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//
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//setup.cpu.dout.gpio_setup = &DSP28335::GPIO::gpio_dicrete_outputs_setup;
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//
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// Analog Faults
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//
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//setup.periphery.analog_faults.p_gpio_analog_fault_setup = &DSP28335::GPIO::gpio_analog_fault_setup;
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//setup.periphery.analog_faults.p_analog_fault_read = &DSP28335::GPIO::gpio_analog_fault_read;
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}//
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void hardcode_pwm_configuration(PERIPHERY::PWMSInterfaceConfiguration& config)
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{
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config.pwm_frequency = SINGLE_PHASE_PWM_FREQUENCY;
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config.adc_isr_quantity = SINGLE_PHASE_ADC_ISR_QUANTITY;
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config.adc_isr_offset_relative = SINGLE_PHASE_ADC_ISR_OFFSET_RELATIVE;
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config.cascade_quantity = SINGLE_PHASE_CASCADE_QUANTITY;
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config.cell_quantity = SINGLE_PHASE_CELL_QUANTITY;
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config.cell_quantity_in_cascade[0] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_00;
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config.cell_quantity_in_cascade[1] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_01;
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config.cell_quantity_in_cascade[2] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_02;
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config.cell_quantity_in_cascade[3] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_03;
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config.cell_quantity_in_cascade[4] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_04;
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config.cell_quantity_in_cascade[5] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_05;
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config.cell_quantity_in_cascade[6] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_06;
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config.cell_quantity_in_cascade[7] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_07;
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config.cell_quantity_in_cascade[8] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_08;
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config.cell_quantity_in_cascade[9] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_09;
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config.cell_quantity_in_cascade[10] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_10;
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config.cell_quantity_in_cascade[11] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_11;
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config.cell_quantity_in_cascade[12] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_12;
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config.cell_quantity_in_cascade[13] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_13;
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config.cell_quantity_in_cascade[14] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_14;
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config.cell_quantity_in_cascade[15] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_15;
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config.cell_quantity_in_cascade[16] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_16;
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config.cell_quantity_in_cascade[17] = SINGLE_PHASE_CELL_QANTITY_IN_CASCADE_17;
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//
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}//
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//
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